msm8974-mainline / linux

Mainline Kernel fork for MSM8x74 devices
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FP2 - Support for USB expansion port #21

Open brockauly opened 3 days ago

brockauly commented 3 days ago

The Fairphone 2 has an USB expansion port behind the back cover, near the battery (found very few info, pinout here ). It is not supported yet in the kernel (nothing is detected when I plug a peripheral).

What I tried

I have tried to modify the device tree, recompile the kernel and flash it but I cannot get it to work. My fork is available here. I went from the branch qcom-msm8974-6.11.y and created a branch qcom-msm8974-6.11-wip where I added two tags (v6.11.5-msm8974 and v6.11.6-msm8974) to test my changes. I then updated the APKBUILD of linux-postmarketos-qcom-msm8974 to retrieve the tar from my fork with my tag, then used pmbootstrap build --force linux-postmarketos-qcom-msm8974, then install & flash. My modifications are correctly applied to the kernel, but the USB still doesn't work, so I suppose my modifications are wrong :

In /arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts

&usb {
    status = "okay";

    phys = <&usb_hs1_phy>, <&usb_hs2_phy>;
    phy-select = <&tcsr 0xb000 0>;
    extcon = <&smbb>, <&usb_id>;
    vbus-supply = <&chg_otg>;

    hnp-disable;
    srp-disable;
    adp-disable;
};

&usb_hs1_phy {
    status = "okay";

    v1p8-supply = <&pm8941_l6>;
    v3p3-supply = <&pm8941_l24>;

    extcon = <&smbb>;
    qcom,init-seq = /bits/ 8 <0x1 0x64>;
};

&usb_hs2_phy {
    status = "okay";

    v1p8-supply = <&pm8941_l6>;
    v3p3-supply = <&pm8941_l24>;

    extcon = <&smbb>;
    qcom,init-seq = /bits/ 8 <0x1 0x64>;
};

Have you already tried to modify this, or do you have any insight about what I am doing wrong ?

brockauly commented 3 days ago

I have also tried to enable only the second usb_phy, without success :

&usb {
    status = "okay";

    phys = <&usb_hs2_phy>;
    phy-select = <&tcsr 0xb000 0>;
    extcon = <&smbb>, <&usb_id>;
    vbus-supply = <&chg_otg>;

    hnp-disable;
    srp-disable;
    adp-disable;
};

&usb_hs2_phy {
    status = "okay";

    v1p8-supply = <&pm8941_l6>;
    v3p3-supply = <&pm8941_l24>;

    extcon = <&smbb>;
    qcom,init-seq = /bits/ 8 <0x1 0x64>;
};
z3ntu commented 2 days ago

I've also looked into this at some point, but unfortunately I didn't have any hardware to test (or rather, the soldered-on USB-A port didn't even work with downstream kernel).

As far as I know, it should just be configuring the second USB port in dts, similar to what you've done and then it should work. But I don't think you can copy paste the properties from the primary USB node since they're connected differently and e.g. smbb shouldn't do much with the 2nd USB port.

Downstream commit: https://github.com/FairphoneMirrors/android_kernel_fairphone_msm8974/commit/dfa02455f626b7ed3d879d5880a4da099d5ebccc

Maybe also relevant, the one pin for charging goes to smbb "DC" input, unlike the main USB connector which goes to the "USB" input of smbb.

But otherwise, the pogo pins directly connect to the SoC for the USB HS2 interface, main USB connector goes to HS1.

From SoC side the ID pin for HS2 is pulled to ground, so the USB OTG stuff can't work there, you probably need to force it to host mode.

brockauly commented 1 hour ago

I have also tried to enable only the second usb_phy, without success :

Actually I managed to have the 2nd port ONLY by updating phy-select = <&tcsr 0xb000 1>; to select the other phy. But in that case the main USB doesn't work anymore, obviously.

I can't find a way to enable both at the same time. Should I define a second USB controller to have one for each phy as in here ? In that case, how can I find the address of that second controller ? Can it be the same one ? I tried that without success.

Or is there a way to enable both phys with only one controller ? If yes, do you know how ?

z3ntu commented 1 hour ago

Looking at upstream dts I don't see any board currently using two phys in one controller, only qcom-apq8074-dragonboard.dts but that's only using the 2nd.

But from some commit message I'm pretty certain there's only one USB controller but with two PHYs.

I'd actually be curious now how downstream does this. I'll try asking around.