Closed mtfuller closed 8 years ago
I believe I finished getting the CPUs to work as multiple threads. Each CPU has 1 thread, and each should be able to read/write from a single RAM without any concurrency issues. Updated test code for the Threaded CPUs and the DMA Channels.
I believe I finished getting the CPUs to work as multiple threads. Each CPU has 1 thread, and each should be able to read/write from a single RAM without any concurrency issues. Updated test code for the Threaded CPUs and the DMA Channels.