Closed dogukan-bicer closed 5 months ago
Hello. Thank you for your trying the mmRISC-1. The error message "Error: riscv.cpu: IR capture error; saw 0x00 not 0x01" is probably caused by the FPGA configuration being set to 2-wire cJTAG instead of 4-wire JTAG. Please comment out "`define ENABLE_CJTAG" in verilog/common/defines_chip.v to disable it and reconfigure the FPGA as 4-wire JTAG. Just to be sure, when I connected my Raspberry Pi 4B to an FPGA configured as cJTAG, the error "Error: riscv.cpu: IR capture error; saw 0x00 not 0x01" was reproduced. I think the cause of this problem is most likely the above.
In addition, please note that openocd_rpi.cfg does not include the secure authentication description for the debugger, so please turn off SW9 on the DE10-Lite board to disable debugger authentication (see Table 4.4 on page 120 of mmRISC-1_TRM.pdf).
Thank you for your feedback, I will edit the defines_chip.v file as you said and try again. Regardless of the topic, how can I implement the riscv32b instruction set on the processor you developed?
If you want to implement B extension, please add the necessary bit manipulation logics and related interface signals in cpu_datapath.v, and add the corresponding pipeline logics to control the interface signals in cpu_pipeline.v.
As you wrote, when I commented the "define ENABLE_CJTAG" in defines_chip.v and compiled it again, the problem was solved and the debugger was successfully switched to Eclipse. Thanks again
I'm glad it was resolved. Thank you !
Hi I can run the processor implementation you developed on DE10 lite. When I debugged the sample projects you developed on the Eclipse ide on Raspberry pi 4b, the openocd terminal gave the following error "Error: riscv.cpu: IR capture error; saw 0x00 not 0x01" The links are as you show in the pdf. I'm sure I did it and used it in the openocd_rpi.cfg configuration (note: openocd version 0.11.0). How can we fix this problem? Kind regards.