need IRQ between FPGA and host

myriadrf / Novena-RF

A 300 MHz to 3800 MHz RF module for the Novena Open Hardware Computing Platform

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need IRQ between FPGA and host #9

Closed guruofquality closed 9 years ago

guruofquality commented 9 years ago

We need to be able to sleep with a timeout for read/writeStream when the stream is not ready. We can select()/poll() on a userspace GPIO from sysfs. Just need to figure out a possible GPIO candidate between the FPGA and the arm. Suggestions appreciated.

guruofquality commented 9 years ago

Is there an available GPIO that we arent using (check schematic)?
Is it possible to use EIM_WAIT as an irq (probably hard to do, needs kernel support)?
Or re-purposing one of the 4 cpu_spi GPIOs, as all LMS GPIOs, antenna switches, and enables can eventually be driven from the register interface. And sen is already controlled through the sysfs GPIO anyway.

guruofquality commented 9 years ago

used ECSPI3_RDY https://github.com/myriadrf/Novena-RF/commit/620d0c852232656ad54bfa7c1c0d26e68c98c9af