Open bonnefoi opened 3 months ago
I've had issues before with the examples not working with newer versions of the toolchain.
E.g. with Yosys 0.27, I had to add "-top chip" in the Makefile, because it would no longer pick "chip" implicitly as the top level module.
Also, arachne-pnr is still being used in the Makefile, which has been unmaintained for a while so it would not be surprising that it does not work with more recent Yosys output. You could try to use nextpnr instead.
Thank you very much for your answer !
I've already encountered the issue with the automatic selection of the top circuit with newer version of yosys, but stupid me, I've tried -top top
...
It's working now and I can now start to connect it to the SoC.
Hello,
I've a lot of issues with the SRAM example with the io constraints like
sram_addr_to_pad
not known.When I try to change it to
ADR
in the filesram_io_ice40
, I've got an error:chip.blif:322: fatal error: toplevel inout port 'ADR[0]' connected to tristate buffer and driving a net
I know that is old tech by now, but I would like to use SRAM for my PicoRV32 that uses only ~12k of BRAM currently.
Let me know if you could help me. Best regards, Pierre-Francois.