Fix several bugs in PI DMA alignments and register reads

n64dev / cen64

Cycle-Accurate Nintendo 64 Emulator

BSD 3-Clause "New" or "Revised" License

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Fix several bugs in PI DMA alignments and register reads #200

Closed rasky closed 3 years ago

rasky commented 3 years ago

With reference to https://github.com/PeterLemon/N64/tree/master/CPUTest/DMAAlignment-PI-cart

Before:

After:

loganmc10 commented 3 years ago

This commit distorts the graphics on AI Shougi 3

rasky commented 3 years ago

Can you maybe isolate the exact change that causes the regression?

rasky commented 3 years ago

So it looks like the problem is that AI Shougi 3 requests several transfers with PI_WR_LEN_REG = 0x3FE, into an aligned buffer in RDRAM. If we transfer exactly 0x3FF bytes (as per new patch), the graphics is distorted. If we transfer 0x400 bytes (as per previous code), the graphics is OK. I tried to dump the extra bytes and they all are different and seem legit.

This contradicts my tests where PI does actually manage to transfer an odd number of bytes. I will have to double check it.

loganmc10 commented 3 years ago

Yeah I always found this very bizarre. Don't the PI docs say that the transfer length must be a multiple of 8 bytes? I swear I read that, but it seems like the reality is much different.