This PR aims to update the output circuit structure and apply some code optimizations to the circuit generation.
Merging nodes can be intensive if we have to go through every gate and every signal to get some information about them and update the necessary values, so I tried to reduce gates and signals traversing as much as possible, at least as a first iteration.
I also removed unnecessary code, functions and data properties, and created the Signal struct to store signal data.
Description
This PR aims to update the output circuit structure and apply some code optimizations to the circuit generation.
Merging nodes can be intensive if we have to go through every gate and every signal to get some information about them and update the necessary values, so I tried to reduce gates and signals traversing as much as possible, at least as a first iteration.
I also removed unnecessary code, functions and data properties, and created the
Signal
struct to store signal data.