SPI_MODE/CPHA incorrectly implemented

[zzattack]

Both the 'transmitter' and 'receiver' procedural blocks execute at the same edge (posedge w_SPI_Clk). This cannot be correct, flipping must occur before the master performs its sampling.

[Buck008]

Yes, I think r_SPI_MISO_Bit should be updated at negaative w_SPI_Clk.

[OmarAmer01]

@Buck008 Correct. I'm making a UVM environment for this module to practice and found this error. To fix it:

Replace

Line 137: always @(posedge w_SPI_Clk or posedge i_SPI_CS_n) begin

With

Line 137: always @(negedge w_SPI_Clk or posedge i_SPI_CS_n) begin

[Buck008]

@OmarAmer01 And also for w_SPI_Clk, it should be like this: assign w_SPI_Clk = (SPI_MODE==2 || SPI_MODE==1) ? ~i_SPI_Clk : i_SPI_Clk;