TimeString
commented
6 years ago That sounds like a plan! BTW, In the early design, we also have the wiring logic and wiring interface. As an evidence, you can see there's a HardwareTypePin declared in models.py. I guess the logic may not fit here and we eventually have to retire that portion, but just for your reference. If you can reuse it then great.
A separate comment, since the representation has to be used in both AutoGrader end and testbed end, you can modulize it so that the module can be used for both sides.
Klamath233
The goal of this addition is to create a wiring-free experience of assignment setup. Currently, when we set up the device, we need to re-wire all the devices. With this update, the wiring is done in software. All the pins are, instead of, wired together directly, are wired to an FPGA. The wiring is therefore effectively done by programming the FPGA. To facilitate the process, the following modules shall be implemented:
[ ] A front end, integrated with the AutoGrader interface, presenting a GUI that shows all available devices and pins and allow the instructor to wire them by drawing lines between the pins. The logic in front end also needs to translate the graphical wiring to an intermediate representation for the backend to program the FPGA.
[ ] A back end, translating the intermediate representation to an FPGA binary.
[x] The intermediate representation, preferably a JSON file for simplicity.