Closed Z-KN closed 1 year ago
Hi, the C++ code maps the neural network to a chip floorplan outlined in the manual. This includes the number of tiles, processing elements and sub-arrays as well as the interconnect, buffers and other necessary components. Then, using detailed circuit models it calculates the area, latency, energy consumption of the entire chip based on real traces from the neural network operation.
by enabling the 'validated' parameter in param.cpp the simulations will be calibrated using real chip measurements. We encourage our users to use the simulator as a tool to explore the different design parameters available for CIM and motivate further research on those designs.
If you are referring to the inference accuracy of the chip, please take a look at the python file 'inference.py' where the operation of the chip is simulated including non-ideal effects like the on/off ratio, array size, ADC precision, retention, etc.
Understood. Thanks!
Or does the C++ code not take care of real computation, but only give relative metrics?