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newaetech / cw310-bergen-board

CW310 - Kintex FPGA ('Bergen Board') Target
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Board files for vivado #6

Open nicolast0604 opened 2 years ago

nicolast0604 commented 2 years ago

If I would like to work on this board with Vivado, shall I install the board files? If yes, where can I get it?

colinoflynn commented 2 years ago

You can find two example applications at https://github.com/newaetech/cw310-bergen-board/tree/main/fpga - the "aes" examples is like the CW305 one, the "test" is a board test we use in production.

There is an XCF file at https://github.com/newaetech/cw310-bergen-board/tree/main/pins as well for your use.

If you want to run OpenTitan on the board you can follow the getting started guide one opentitan.org.

nicolast0604 commented 2 years ago

Hi Colinoflynn I just followed the steps in opentitan and it is successful in implementation but failed in bitstream generation. I opened the hardware manager and it seems connected but no target information showed.

As the experience of nexys video, I downloaded the board files from digilent and put it in the /data of the install path of Vivado. I am wondering if I need to do the same thing to make the bitstream successfully?

Best Regards

nicolast0604 commented 2 years ago

Hi My question is that I would like to let Vivado's hardware manager can recognize the CW310 board and let me program the device. However, so far it shows no hardware target is open and only have localhost(0) status connected.

This is very confusing.

colinoflynn commented 2 years ago

Got it! I misunderstood the problem there.

Do you have an external JTAG cable? The CW310 doesn't appear under Vivado, you need an external JTAG cable for this (Xilinx Platform USB cable or Xilinx SmartLynq cable). [Minor technical note - Xilinx doesn't provide a documented way of allowing us to do this is the main reason why, there is some special deal with Digilent allowing usage but it's never been clear on the license even if we reverse engineered it. As a result the FPGA jtag lines are just routed to a header on the board.]

nicolast0604 commented 2 years ago

Step 6 from the opentitan guideline, Use a USB-C cable to connect your PC with the USB-C Data connector (J8) in the lower left corner on the board.

do you mean that we need to use Xilinx Platform USB cable or Xilinx SmartLynq cable to replace this?

Is this just make this FPGA board visable to Vivado or it needs to even transfer the bit stream or firmware to the board?