Increase default FIFO size to 1000

[rtzoeller]

• [x] This contribution adheres to CONTRIBUTING.md.

What does this Pull Request accomplish?

Increase the default FIFO size to 1000, from 50. A FIFO depth of 1000 seems to work for the 9057, although it's a bit wasteful on the 8880. I saw peaks at ~65% FIFO utilization (albeit with nothing else running) on the 9057, and the 8880 never crossed 5%. In terms of memory usage, it looks like the EDL allocates a FIFO of the specified length, with the type being an array of size (3 + # channels). I couldn't get the FIFO creation to show up as a profile-able memory allocation, but assuming it's contiguous memory, you're looking at roughly 824kb of memory usage for the specified configuration (1000 x 103 x 8)

Why should this Pull Request be merged?

The existing default of 50 is insufficient for systems of moderate scale at reasonable loop rates (e.g. logging 100 channels at 1kHz), especially on cRIO.

What testing has been done?

Created a new instance of the custom device and confirmed the FIFO depth was 1000.

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[niphilj]

How arbitrary is 1000?

[rtzoeller]

How arbitrary is 1000?

Ultimately arbitrary, but deliberately chosen in this case. I'll forward you the internal thread.