Enable 2021 builds and temporarily remove System Explorer action VIs

[x] This contribution adheres to CONTRIBUTING.md.

What does this Pull Request accomplish?

Add LV 2021 and bitness callouts to build configuration
Pull broken System Explorer Action VIs out of the LLB to allow 2021 to build
Convert variant to IOV in Engine's Configure Module.vi to use https://github.com/ni/niveristand-scan-engine-module-libraries/pull/44

Why should this Pull Request be merged?

Prepare for 2021 changes to support split 32-bit/64-bit System Explorer builds without LV 2021 32-bit cRIO and ECAT support (Without these changes, 2021 fails to build entirely due to the broken Action VIs)

What testing has been done?

Previously tested the dev branch build on VS 2020 and 2021.
Pending testing with this PR build (now that the modules and FXP changes are mainlined)

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FPGA - Clear.vi.png

![capture](https://raw.githubusercontent.com/niveristand-diff-bot/diff-images/master/NI/niveristand-scan-engine-ethercat-custom-device/PR-181/2021-10-18/12%3A21%3A36/FPGA%20-%20Clear.vi.png)

FPGA - Download (ECAT).vi.png

![capture](https://raw.githubusercontent.com/niveristand-diff-bot/diff-images/master/NI/niveristand-scan-engine-ethercat-custom-device/PR-181/2021-10-18/12%3A21%3A36/FPGA%20-%20Download%20(ECAT).vi.png)

FPGA - Revert (ECAT).vi.png

FPGA - Select Bitfile (ECAT).vi.png

FPGA - Select Bitfile (Local).vi.png

Main - Auto Detect Modules.vi.png

Main - Manages 3rd Party Slaves.vi.png

SEECD Engine.lvlib--Config Module.vi.png

ni / niveristand-scan-engine-ethercat-custom-device