SEECD System Explorer.lvlib--Local_niECATCreateIOVStructureFromBitfile.vi.png
![capture](https://raw.githubusercontent.com/niveristand-diff-bot/diff-images/master/NI/niveristand-scan-engine-ethercat-custom-device/PR-186/2021-11-02/17%3A09%3A57/SEECD%20System%20Explorer.lvlib--Local_niECATCreateIOVStructureFromBitfile.vi.png)SEECD System Explorer.lvlib--Local_niECATGetCustomIOVNodeArrayFrom2009Bitfile.vi.png
![capture](https://raw.githubusercontent.com/niveristand-diff-bot/diff-images/master/NI/niveristand-scan-engine-ethercat-custom-device/PR-186/2021-11-02/17%3A09%3A57/SEECD%20System%20Explorer.lvlib--Local_niECATGetCustomIOVNodeArrayFrom2009Bitfile.vi.png)SEECD System Explorer.lvlib--Local_niECATGetCustomIOVNodeArrayFrom2010Bitfile.vi.png
![capture](https://raw.githubusercontent.com/niveristand-diff-bot/diff-images/master/NI/niveristand-scan-engine-ethercat-custom-device/PR-186/2021-11-02/17%3A09%3A57/SEECD%20System%20Explorer.lvlib--Local_niECATGetCustomIOVNodeArrayFrom2010Bitfile.vi.png)
What does this Pull Request accomplish?
Remove compiled code from FPGA VIs added in #180
Why should this Pull Request be merged?
Make unit tests pass
What testing has been done?
None