hi !
I use the Scan engine and Ethercat VCD .In my configuration i have 4 cRIO 9145 with different modules. 2 cRIO 9145 use the standard features to access the modules, and specific FPGA code was developped for the 2 others.
My problem is the following, after some hours or some days, i have the error -66460 and the error LED start blinking on the two cRIO with FPGA code. The communication is stopped between these 2 cRIO and VeriStand. If i reset the error from the Distributed Sytem Manager , the communication start again. It seems the FPGA still runing, but the communication is stopped. During the error the scan Mode State goes to 3. The Async Loop Late Duration is between 300µs and 400µs . Sometimes the Async loop late count is incremented, but it seems there is no correlation with the problem...
Is there a way to ignore this error ? The communication should not stop even if we loose some cycle...
hi ! I use the Scan engine and Ethercat VCD .In my configuration i have 4 cRIO 9145 with different modules. 2 cRIO 9145 use the standard features to access the modules, and specific FPGA code was developped for the 2 others.
My problem is the following, after some hours or some days, i have the error -66460 and the error LED start blinking on the two cRIO with FPGA code. The communication is stopped between these 2 cRIO and VeriStand. If i reset the error from the Distributed Sytem Manager , the communication start again. It seems the FPGA still runing, but the communication is stopped. During the error the scan Mode State goes to 3. The Async Loop Late Duration is between 300µs and 400µs . Sometimes the Async loop late count is incremented, but it seems there is no correlation with the problem...
Is there a way to ignore this error ? The communication should not stop even if we loose some cycle...
Thanks for your help