Closed avelure closed 1 year ago
It's caused by a type conversion. Can you try making the change below and re-run? It should print the location just before it crashes.
diff --git a/src/simp.c b/src/simp.c
index 9414c59c5cd1..198649c61219 100644
--- a/src/simp.c
+++ b/src/simp.c
@@ -359,8 +359,10 @@ static tree_t simp_type_conv(tree_t t, simp_ctx_t *ctx)
return t; // Not supported currently
}
- if (eval_possible(t, ctx->registry))
+ if (eval_possible(t, ctx->registry)) {
+ fmt_loc(stdout, tree_loc(t));
return eval_try_fold(ctx->jit, t, NULL, NULL);
+ }
return t;
}
It does print the location twice, but if I do an MWE it does not crash
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity test is
generic (
GC_SAMPLES_PER_BIT : natural
);
end entity test;
architecture beh of test is
begin
b_tx_status_timer : block is
constant C_MAX_CYCLES_NEW_WORD : natural := natural(5.5 * real(GC_SAMPLES_PER_BIT));
begin
process
begin
report "OK";
wait;
end process;
end block;
end architecture beh;
GC_SAMPLES_PER_BIT is 16. It is a constant passed through the hierarchy, but not from the top level.
Thanks. It's a bit mysterious. Could you also try setting the environment variable export NVC_LOWER_VERBOSE=1
and then re-running. It should dump lots of output that looks like:
Kind thunk
Blocks 1
Registers 6
Types 5
Variables 0
Result -2^63..2^63-1
Begin
0: r0 := const 1 // -2^63..2^63-1 => 1
r1 := const 0 // -2^63..2^63-1 => 0
r2 := debug locus WORK.TRACE1-body-35 // D<>
zero check r1 locus r2
r3 := div r0 / r1 // -2^63..2^63-1
r4 := cast r3 // -2^31..2^31-1 => -2^63..2^63-1
r5 := cast r4 // -2^63..2^63-1
return r5
Can you paste the last one just before it crashes?
This is the last block before it crashes, however it is not in this package that the file location was printed
Name DESIGN_LIB.EEPROM_PKG
Kind package
Blocks 35
Registers 799
Types 76
DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT {0..8, 0..8, 0..2}
DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT {[24] : 0..8, [*] : 0..8, 0..15, -2^31..2^31-1, 0..1}
Variables 51
C_POWER_STABLE_DELAY // -2^31..2^31-1 => 0..2^31-1, constant
C_IMAGE_CHECK_VALUE // [16] : 0..8 => 0..8, constant
C_NUM_CRC_IN_IMAGE // -2^31..2^31-1 => 0..2^31-1, constant
C_DATA_INVALID_VERSION // [8] : 0..8 => 0..8, constant
C_CAL_TABLE_SIZE // -2^31..2^31-1 => 0..2^31-1, constant
C_CAL_CRC_POLYNOMIAL // [16] : 0..8 => 0..8, constant
C_CAL_CRC_INIT // [16] : 0..8 => 0..8, constant
C_CRC_OK // [16] : 0..8 => 0..8, constant
C_IMAGE_CHECK // -2^31..2^31-1 => 0..2^31-1, constant
C_INTERVAL_BETWEEN_COMMANDS // -2^31..2^31-1 => 0..2^31-1, constant
C_NUM_INTERMEDIATE_POINTS // -2^31..2^31-1 => 0..2^31-1, constant
C_ACC_LIMIT_DEFAULT // -2^31..2^31-1 => 0..2^31-1, constant
C_VEL_LIMIT_DEFAULT // -2^31..2^31-1 => 0..2^31-1, constant
C_POWER // -2^31..2^31-1 => 0..2^31-1, constant
C_STEP_MODE // -2^31..2^31-1 => 0..2^31-1, constant
C_MIL1553_THRESHOLD_1_SYNC // -2^31..2^31-1 => 0..2^31-1, constant
C_MIL1553_THRESHOLD_2_DATA // -2^31..2^31-1 => 0..2^31-1, constant
C_MIL1553_THRESHOLD_3_NO_BIT // -2^31..2^31-1 => 0..2^31-1, constant
C_PARAMETERS_CRC // -2^31..2^31-1 => 0..2^31-1, constant
C_SINE_WAVE // -2^31..2^31-1 => 0..2^31-1, constant
C_SINE_WAVE_CRC // -2^31..2^31-1 => 0..2^31-1, constant
C_VERSION_NUMBER // -2^31..2^31-1 => 0..2^31-1, constant
C_CAL_A // -2^31..2^31-1 => 0..2^31-1, constant
C_CAL_A_CRC // -2^31..2^31-1 => 0..2^31-1, constant
C_CAL_B // -2^31..2^31-1 => 0..2^31-1, constant
C_CAL_B_CRC // -2^31..2^31-1 => 0..2^31-1, constant
C_EEPROM_IMAGE_SIZE // -2^31..2^31-1 => 0..2^31-1, constant
C_EEPROM_IMAGE_2_START // -2^31..2^31-1 => 0..2^31-1, constant
C_IMAGE_SEARCH_TIME_OUT // -2^31..2^31-1 => 0..2^31-1, constant
C_EEPROM_BYTE_CNT_WIDTH // -2^31..2^31-1 => 0..2^31-1, constant
C_EERPOM_POWER_STATE // [5] : DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{} => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}, constant
C_MAX_WORD_LENGTH // -2^31..2^31-1 => 0..2^31-1, constant
C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1, constant
DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT_TEMPLATE // [*] : DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{} => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, constant
C_SEGMENT_RECORDS // [*] : DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{} => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, constant
record139 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record140 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record141 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record142 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record143 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record144 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record145 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record146 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record147 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record148 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record149 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record150 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record151 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record152 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record153 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
record154 // DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}, temp
Begin
0: r0 := package init STD.STANDARD // P<STD.STANDARD>
r1 := package init IEEE.STD_LOGIC_1164 // P<IEEE.STD_LOGIC_1164>
r2 := package init IEEE.NUMERIC_STD // P<IEEE.NUMERIC_STD>
r3 := package init DESIGN_LIB.TOP_PKG // P<DESIGN_LIB.TOP_PKG>
r4 := const 4095 // -2^31..2^31-1 => 4095
r5 := const 0 // -2^31..2^31-1 => 0
r7 := const 0 // 0..1 => 0
C_POWER_STABLE_DELAY := store r4
r8 := const 16 // # => 16
r9 := index C_IMAGE_CHECK_VALUE // @<0..8> => 0..8
r10 := const 3 // 0..8 => 3
r11 := const 2 // 0..8 => 2
r12 := const [r10,r10,r10,r10,r11,r11,r11,r10,r10,r11,r11,r11,r10,r11,r10,r11] // [16] : 0..8 => 0..8
r13 := address of r12 // @<0..8> => 0..8
r15 := const 15 // -2^31..2^31-1 => 15
r16 := const 1 // 0..1 => 1
r9 := copy r13 count r8
r18 := const 4 // -2^31..2^31-1 => 4
C_NUM_CRC_IN_IMAGE := store r18
r19 := const 8 // # => 8
r20 := index C_DATA_INVALID_VERSION // @<0..8> => 0..8
r21 := const [r10,r10,r10,r10,r10,r10,r10,r10] // [8] : 0..8 => 0..8
r22 := address of r21 // @<0..8> => 0..8
r20 := copy r22 count r19
r26 := const 4096 // -2^31..2^31-1 => 4096
C_CAL_TABLE_SIZE := store r26
r27 := index C_CAL_CRC_POLYNOMIAL // @<0..8> => 0..8
r28 := const [r11,r11,r11,r10,r11,r11,r11,r11,r11,r11,r10,r11,r11,r11,r11,r10] // [16] : 0..8 => 0..8
r29 := address of r28 // @<0..8> => 0..8
r27 := copy r29 count r8
r32 := index C_CAL_CRC_INIT // @<0..8> => 0..8
r33 := const [r11,r11,r11,r11,r11,r11,r11,r11,r11,r11,r11,r11,r11,r11,r11,r11] // [16] : 0..8 => 0..8
r34 := address of r33 // @<0..8> => 0..8
r32 := copy r34 count r8
r37 := index C_CRC_OK // @<0..8> => 0..8
r37 := copy r34 count r8
C_IMAGE_CHECK := store r5
r40 := const 2 // -2^31..2^31-1 => 2
C_INTERVAL_BETWEEN_COMMANDS := store r40
r41 := const 5 // -2^31..2^31-1 => 5
C_NUM_INTERMEDIATE_POINTS := store r41
r42 := const 6 // -2^31..2^31-1 => 6
C_ACC_LIMIT_DEFAULT := store r42
r43 := const 9 // -2^31..2^31-1 => 9
C_VEL_LIMIT_DEFAULT := store r43
r44 := const 12 // -2^31..2^31-1 => 12
C_POWER := store r44
r45 := const 13 // -2^31..2^31-1 => 13
C_STEP_MODE := store r45
r46 := const 14 // -2^31..2^31-1 => 14
C_MIL1553_THRESHOLD_1_SYNC := store r46
C_MIL1553_THRESHOLD_2_DATA := store r15
r47 := const 16 // -2^31..2^31-1 => 16
C_MIL1553_THRESHOLD_3_NO_BIT := store r47
r48 := const 17 // -2^31..2^31-1 => 17
C_PARAMETERS_CRC := store r48
r49 := const 19 // -2^31..2^31-1 => 19
C_SINE_WAVE := store r49
r50 := const 275 // -2^31..2^31-1 => 275
C_SINE_WAVE_CRC := store r50
r51 := const 277 // -2^31..2^31-1 => 277
C_VERSION_NUMBER := store r51
r52 := const 278 // -2^31..2^31-1 => 278
C_CAL_A := store r52
r53 := const 8470 // -2^31..2^31-1 => 8470
C_CAL_A_CRC := store r53
r54 := const 8472 // -2^31..2^31-1 => 8472
C_CAL_B := store r54
r55 := const 16664 // -2^31..2^31-1 => 16664
C_CAL_B_CRC := store r55
r56 := const 16666 // -2^31..2^31-1 => 16666
C_EEPROM_IMAGE_SIZE := store r56
C_EEPROM_IMAGE_2_START := store r56
r57 := const 16669 // -2^31..2^31-1 => 16669
C_IMAGE_SEARCH_TIME_OUT := store r57
r58 := const 33332 // -2^31..2^31-1 => 33332
r59 := fcall DESIGN_LIB.TOP_PKG.LOG2_CEIL(N)N r3, r58 // -2^31..2^31-1 => 0..2^31-1
C_EEPROM_BYTE_CNT_WIDTH := store r59
r61 := index C_EERPOM_POWER_STATE // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}> => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r64 := const 1 // # => 1
r65 := const 0 // 0..2 => 0
r66 := const {r10,r11,r65} // DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r67 := address of r66 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}>
r69 := const 0 // # => 0
r70 := array ref r61 offset r69 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}> => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r70 := copy r67
r71 := const {r11,r11,r65} // DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r72 := address of r71 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}>
r75 := array ref r61 offset r64 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}> => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r75 := copy r72
r76 := const 1 // 0..2 => 1
r77 := const {r11,r10,r76} // DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r78 := address of r77 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}>
r81 := const 2 // # => 2
r82 := array ref r61 offset r81 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}> => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r82 := copy r78
r83 := const {r11,r10,r65} // DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r84 := address of r83 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}>
r87 := const 3 // # => 3
r88 := array ref r61 offset r87 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}> => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r88 := copy r84
r89 := const 2 // 0..2 => 2
r90 := const {r11,r10,r89} // DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r91 := address of r90 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}>
r93 := const 4 // # => 4
r94 := array ref r61 offset r93 // @<DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}> => DESIGN_LIB.EEPROM_PKG.T_EEPROM_OUTPUT{}
r94 := copy r91
r97 := const 3 // -2^31..2^31-1 => 3
C_MAX_WORD_LENGTH := store r97
r98 := fcall DESIGN_LIB.TOP_PKG.LOG2_CEIL(N)N r3, r4 // -2^31..2^31-1 => 0..2^31-1
C_MAX_ADDR_WIDTH := store r98
r99 := null // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r100 := const 0 // 0..15 => 0
r101 := const 15 // 0..15 => 15
r102 := wrap r99 [r100 r101 r7] // [*] : DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT_TEMPLATE := store r102
r103 := alloc r8 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r104 := wrap r103 [r100 r101 r7] // [*] : DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
C_SEGMENT_RECORDS := store r104
r105 := const [r11]*24 // [24] : 0..8 => 0..8
r106 := address of r105 // @<0..8> => 0..8
r110 := const 1 // -2^31..2^31-1 => 1
r112 := sub r98 - r110 // -2^31..2^31-1 => -1..2147483646
r114 := cmp r5 > r112
r115 := range length left r112 right r5 dir r16 // #
r116 := alloc r115 // @<0..8> => 0..8
r117 := wrap r116 [r112 r5 r16] // [*] : 0..8
cond r114 then 2 else 1
1: r118 := const 2 // 0..8 => 2
r116 := memset r118 length r115
jump 2
2: r119 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r120 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r121 := const 1 // -2^31..2^31-1 => 1
r123 := sub r120 - r121 // -2^31..2^31-1 => -1..2147483646
r124 := const 0 // -2^31..2^31-1 => 0
r125 := const 1 // 0..1 => 1
r126 := range length left r123 right r124 dir r125 // #
r127 := uarray len r117 dim 0 // #
length check left r126 == right r127 locus r119
r128 := const 0 // 0..15 => 0
r129 := const 0 // 0..1 => 0
r130 := index record139 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r131 := record ref r130 field 0 // @<0..8> => 0..8
r132 := const 24 // # => 24
r131 := copy r106 count r132
r133 := record ref r130 field 1 // @<[*] : 0..8> => 0..8
r134 := uarray left r117 dim 0 // #
r135 := uarray right r117 dim 0 // #
r136 := uarray dir r117 dim 0 // 0..1
r137 := unwrap r117 // @<0..8> => 0..8
r138 := wrap r137 [r134 r135 r136] // [*] : 0..8
r133 := store indirect r138
r139 := record ref r130 field 2 // @<0..15> => 0..15
r139 := store indirect r128
r140 := record ref r130 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r140 := store indirect r121
r141 := record ref r130 field 4 // @<0..1> => 0..1
r141 := store indirect r129
r143 := uarray left r104 dim 0 // #
r144 := cast r143 // 0..15
r145 := neg r144 // 0..15
r146 := uarray dir r104 dim 0 // 0..1
r147 := select r146 then r144 else r145 // 0..15
r148 := cast r147 // # => 0..15
r149 := array ref r103 offset r148 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r149 := copy r130
r150 := const 2 // 0..8 => 2
r151 := const [r150]*24 // [24] : 0..8 => 0..8
r152 := address of r151 // @<0..8> => 0..8
r156 := cmp r124 > r123
r158 := alloc r126 // @<0..8> => 0..8
r159 := wrap r158 [r123 r124 r125] // [*] : 0..8
cond r156 then 4 else 3
3: r160 := const 2 // 0..8 => 2
r158 := memset r160 length r126
jump 4
4: r161 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r162 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r163 := const 1 // -2^31..2^31-1 => 1
r165 := sub r162 - r163 // -2^31..2^31-1 => -1..2147483646
r166 := const 0 // -2^31..2^31-1 => 0
r167 := const 1 // 0..1 => 1
r168 := range length left r165 right r166 dir r167 // #
r169 := uarray len r159 dim 0 // #
length check left r168 == right r169 locus r161
r170 := const 1 // 0..15 => 1
r171 := const 2 // -2^31..2^31-1 => 2
r172 := const 0 // 0..1 => 0
r173 := index record140 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r174 := record ref r173 field 0 // @<0..8> => 0..8
r175 := const 24 // # => 24
r174 := copy r152 count r175
r176 := record ref r173 field 1 // @<[*] : 0..8> => 0..8
r177 := uarray left r159 dim 0 // #
r178 := uarray right r159 dim 0 // #
r179 := uarray dir r159 dim 0 // 0..1
r180 := unwrap r159 // @<0..8> => 0..8
r181 := wrap r180 [r177 r178 r179] // [*] : 0..8
r176 := store indirect r181
r182 := record ref r173 field 2 // @<0..15> => 0..15
r182 := store indirect r170
r183 := record ref r173 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r183 := store indirect r171
r184 := record ref r173 field 4 // @<0..1> => 0..1
r184 := store indirect r172
r186 := uarray left r104 dim 0 // #
r187 := cast r186 // 0..15
r188 := sub r187 - r170 // 0..15 => -1..14
r189 := sub r170 - r187 // 0..15 => -14..1
r190 := uarray dir r104 dim 0 // 0..1
r191 := select r190 then r188 else r189 // 0..15
r192 := cast r191 // # => 0..15
r193 := array ref r103 offset r192 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r193 := copy r173
r194 := const 2 // 0..8 => 2
r195 := const [r194]*24 // [24] : 0..8 => 0..8
r196 := address of r195 // @<0..8> => 0..8
r200 := cmp r166 > r165
r202 := alloc r168 // @<0..8> => 0..8
r203 := wrap r202 [r165 r166 r167] // [*] : 0..8
cond r200 then 6 else 5
5: r204 := const 2 // 0..8 => 2
r202 := memset r204 length r168
jump 6
6: r205 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r206 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r207 := const 1 // -2^31..2^31-1 => 1
r209 := sub r206 - r207 // -2^31..2^31-1 => -1..2147483646
r210 := const 0 // -2^31..2^31-1 => 0
r211 := const 1 // 0..1 => 1
r212 := range length left r209 right r210 dir r211 // #
r213 := uarray len r203 dim 0 // #
length check left r212 == right r213 locus r205
r214 := const 2 // 0..15 => 2
r215 := const 3 // -2^31..2^31-1 => 3
r216 := index record141 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r217 := record ref r216 field 0 // @<0..8> => 0..8
r218 := const 24 // # => 24
r217 := copy r196 count r218
r219 := record ref r216 field 1 // @<[*] : 0..8> => 0..8
r220 := uarray left r203 dim 0 // #
r221 := uarray right r203 dim 0 // #
r222 := uarray dir r203 dim 0 // 0..1
r223 := unwrap r203 // @<0..8> => 0..8
r224 := wrap r223 [r220 r221 r222] // [*] : 0..8
r219 := store indirect r224
r225 := record ref r216 field 2 // @<0..15> => 0..15
r225 := store indirect r214
r226 := record ref r216 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r226 := store indirect r215
r227 := record ref r216 field 4 // @<0..1> => 0..1
r227 := store indirect r211
r229 := uarray left r104 dim 0 // #
r230 := cast r229 // 0..15
r231 := sub r230 - r214 // 0..15 => -2..13
r232 := sub r214 - r230 // 0..15 => -13..2
r233 := uarray dir r104 dim 0 // 0..1
r234 := select r233 then r231 else r232 // 0..15
r235 := cast r234 // # => 0..15
r236 := array ref r103 offset r235 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r236 := copy r216
r237 := const 2 // 0..8 => 2
r238 := const [r237]*24 // [24] : 0..8 => 0..8
r239 := address of r238 // @<0..8> => 0..8
r243 := cmp r210 > r209
r245 := alloc r212 // @<0..8> => 0..8
r246 := wrap r245 [r209 r210 r211] // [*] : 0..8
cond r243 then 8 else 7
7: r247 := const 2 // 0..8 => 2
r245 := memset r247 length r212
jump 8
8: r248 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r249 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r250 := const 1 // -2^31..2^31-1 => 1
r252 := sub r249 - r250 // -2^31..2^31-1 => -1..2147483646
r253 := const 0 // -2^31..2^31-1 => 0
r254 := const 1 // 0..1 => 1
r255 := range length left r252 right r253 dir r254 // #
r256 := uarray len r246 dim 0 // #
length check left r255 == right r256 locus r248
r257 := const 3 // 0..15 => 3
r258 := index record142 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r259 := record ref r258 field 0 // @<0..8> => 0..8
r260 := const 24 // # => 24
r259 := copy r239 count r260
r261 := record ref r258 field 1 // @<[*] : 0..8> => 0..8
r262 := uarray left r246 dim 0 // #
r263 := uarray right r246 dim 0 // #
r264 := uarray dir r246 dim 0 // 0..1
r265 := unwrap r246 // @<0..8> => 0..8
r266 := wrap r265 [r262 r263 r264] // [*] : 0..8
r261 := store indirect r266
r267 := record ref r258 field 2 // @<0..15> => 0..15
r267 := store indirect r257
r268 := record ref r258 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r268 := store indirect r250
r269 := record ref r258 field 4 // @<0..1> => 0..1
r269 := store indirect r254
r271 := uarray left r104 dim 0 // #
r272 := cast r271 // 0..15
r273 := sub r272 - r257 // 0..15 => -3..12
r274 := sub r257 - r272 // 0..15 => -12..3
r275 := uarray dir r104 dim 0 // 0..1
r276 := select r275 then r273 else r274 // 0..15
r277 := cast r276 // # => 0..15
r278 := array ref r103 offset r277 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r278 := copy r258
r279 := const 2 // 0..8 => 2
r280 := const [r279]*24 // [24] : 0..8 => 0..8
r281 := address of r280 // @<0..8> => 0..8
r285 := cmp r253 > r252
r287 := alloc r255 // @<0..8> => 0..8
r288 := wrap r287 [r252 r253 r254] // [*] : 0..8
cond r285 then 10 else 9
9: r289 := const 2 // 0..8 => 2
r287 := memset r289 length r255
jump 10
10: r290 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r291 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r292 := const 1 // -2^31..2^31-1 => 1
r294 := sub r291 - r292 // -2^31..2^31-1 => -1..2147483646
r295 := const 0 // -2^31..2^31-1 => 0
r296 := const 1 // 0..1 => 1
r297 := range length left r294 right r295 dir r296 // #
r298 := uarray len r288 dim 0 // #
length check left r297 == right r298 locus r290
r299 := const 4 // 0..15 => 4
r300 := const 3 // -2^31..2^31-1 => 3
r301 := index record143 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r302 := record ref r301 field 0 // @<0..8> => 0..8
r303 := const 24 // # => 24
r302 := copy r281 count r303
r304 := record ref r301 field 1 // @<[*] : 0..8> => 0..8
r305 := uarray left r288 dim 0 // #
r306 := uarray right r288 dim 0 // #
r307 := uarray dir r288 dim 0 // 0..1
r308 := unwrap r288 // @<0..8> => 0..8
r309 := wrap r308 [r305 r306 r307] // [*] : 0..8
r304 := store indirect r309
r310 := record ref r301 field 2 // @<0..15> => 0..15
r310 := store indirect r299
r311 := record ref r301 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r311 := store indirect r300
r312 := record ref r301 field 4 // @<0..1> => 0..1
r312 := store indirect r296
r314 := uarray left r104 dim 0 // #
r315 := cast r314 // 0..15
r316 := sub r315 - r299 // 0..15 => -4..11
r317 := sub r299 - r315 // 0..15 => -11..4
r318 := uarray dir r104 dim 0 // 0..1
r319 := select r318 then r316 else r317 // 0..15
r320 := cast r319 // # => 0..15
r321 := array ref r103 offset r320 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r321 := copy r301
r322 := const 2 // 0..8 => 2
r323 := const [r322]*24 // [24] : 0..8 => 0..8
r324 := address of r323 // @<0..8> => 0..8
r328 := cmp r295 > r294
r330 := alloc r297 // @<0..8> => 0..8
r331 := wrap r330 [r294 r295 r296] // [*] : 0..8
cond r328 then 12 else 11
11: r332 := const 2 // 0..8 => 2
r330 := memset r332 length r297
jump 12
12: r333 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r334 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r335 := const 1 // -2^31..2^31-1 => 1
r337 := sub r334 - r335 // -2^31..2^31-1 => -1..2147483646
r338 := const 0 // -2^31..2^31-1 => 0
r339 := const 1 // 0..1 => 1
r340 := range length left r337 right r338 dir r339 // #
r341 := uarray len r331 dim 0 // #
length check left r340 == right r341 locus r333
r342 := const 5 // 0..15 => 5
r343 := const 3 // -2^31..2^31-1 => 3
r344 := index record144 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r345 := record ref r344 field 0 // @<0..8> => 0..8
r346 := const 24 // # => 24
r345 := copy r324 count r346
r347 := record ref r344 field 1 // @<[*] : 0..8> => 0..8
r348 := uarray left r331 dim 0 // #
r349 := uarray right r331 dim 0 // #
r350 := uarray dir r331 dim 0 // 0..1
r351 := unwrap r331 // @<0..8> => 0..8
r352 := wrap r351 [r348 r349 r350] // [*] : 0..8
r347 := store indirect r352
r353 := record ref r344 field 2 // @<0..15> => 0..15
r353 := store indirect r342
r354 := record ref r344 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r354 := store indirect r343
r355 := record ref r344 field 4 // @<0..1> => 0..1
r355 := store indirect r339
r357 := uarray left r104 dim 0 // #
r358 := cast r357 // 0..15
r359 := sub r358 - r342 // 0..15 => -5..10
r360 := sub r342 - r358 // 0..15 => -10..5
r361 := uarray dir r104 dim 0 // 0..1
r362 := select r361 then r359 else r360 // 0..15
r363 := cast r362 // # => 0..15
r364 := array ref r103 offset r363 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r364 := copy r344
r365 := const 2 // 0..8 => 2
r366 := const [r365]*24 // [24] : 0..8 => 0..8
r367 := address of r366 // @<0..8> => 0..8
r371 := cmp r338 > r337
r373 := alloc r340 // @<0..8> => 0..8
r374 := wrap r373 [r337 r338 r339] // [*] : 0..8
cond r371 then 14 else 13
13: r375 := const 2 // 0..8 => 2
r373 := memset r375 length r340
jump 14
14: r376 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r377 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r378 := const 1 // -2^31..2^31-1 => 1
r380 := sub r377 - r378 // -2^31..2^31-1 => -1..2147483646
r381 := const 0 // -2^31..2^31-1 => 0
r382 := const 1 // 0..1 => 1
r383 := range length left r380 right r381 dir r382 // #
r384 := uarray len r374 dim 0 // #
length check left r383 == right r384 locus r376
r385 := const 6 // 0..15 => 6
r386 := index record145 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r387 := record ref r386 field 0 // @<0..8> => 0..8
r388 := const 24 // # => 24
r387 := copy r367 count r388
r389 := record ref r386 field 1 // @<[*] : 0..8> => 0..8
r390 := uarray left r374 dim 0 // #
r391 := uarray right r374 dim 0 // #
r392 := uarray dir r374 dim 0 // 0..1
r393 := unwrap r374 // @<0..8> => 0..8
r394 := wrap r393 [r390 r391 r392] // [*] : 0..8
r389 := store indirect r394
r395 := record ref r386 field 2 // @<0..15> => 0..15
r395 := store indirect r385
r396 := record ref r386 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r396 := store indirect r378
r397 := record ref r386 field 4 // @<0..1> => 0..1
r397 := store indirect r382
r399 := uarray left r104 dim 0 // #
r400 := cast r399 // 0..15
r401 := sub r400 - r385 // 0..15 => -6..9
r402 := sub r385 - r400 // 0..15 => -9..6
r403 := uarray dir r104 dim 0 // 0..1
r404 := select r403 then r401 else r402 // 0..15
r405 := cast r404 // # => 0..15
r406 := array ref r103 offset r405 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r406 := copy r386
r407 := const 2 // 0..8 => 2
r408 := const [r407]*24 // [24] : 0..8 => 0..8
r409 := address of r408 // @<0..8> => 0..8
r413 := cmp r381 > r380
r415 := alloc r383 // @<0..8> => 0..8
r416 := wrap r415 [r380 r381 r382] // [*] : 0..8
cond r413 then 16 else 15
15: r417 := const 2 // 0..8 => 2
r415 := memset r417 length r383
jump 16
16: r418 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r419 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r420 := const 1 // -2^31..2^31-1 => 1
r422 := sub r419 - r420 // -2^31..2^31-1 => -1..2147483646
r423 := const 0 // -2^31..2^31-1 => 0
r424 := const 1 // 0..1 => 1
r425 := range length left r422 right r423 dir r424 // #
r426 := uarray len r416 dim 0 // #
length check left r425 == right r426 locus r418
r427 := const 7 // 0..15 => 7
r428 := index record146 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r429 := record ref r428 field 0 // @<0..8> => 0..8
r430 := const 24 // # => 24
r429 := copy r409 count r430
r431 := record ref r428 field 1 // @<[*] : 0..8> => 0..8
r432 := uarray left r416 dim 0 // #
r433 := uarray right r416 dim 0 // #
r434 := uarray dir r416 dim 0 // 0..1
r435 := unwrap r416 // @<0..8> => 0..8
r436 := wrap r435 [r432 r433 r434] // [*] : 0..8
r431 := store indirect r436
r437 := record ref r428 field 2 // @<0..15> => 0..15
r437 := store indirect r427
r438 := record ref r428 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r438 := store indirect r420
r439 := record ref r428 field 4 // @<0..1> => 0..1
r439 := store indirect r424
r441 := uarray left r104 dim 0 // #
r442 := cast r441 // 0..15
r443 := sub r442 - r427 // 0..15 => -7..8
r444 := sub r427 - r442 // 0..15 => -8..7
r445 := uarray dir r104 dim 0 // 0..1
r446 := select r445 then r443 else r444 // 0..15
r447 := cast r446 // # => 0..15
r448 := array ref r103 offset r447 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r448 := copy r428
r449 := const 2 // 0..8 => 2
r450 := const [r449]*24 // [24] : 0..8 => 0..8
r451 := address of r450 // @<0..8> => 0..8
r455 := cmp r423 > r422
r457 := alloc r425 // @<0..8> => 0..8
r458 := wrap r457 [r422 r423 r424] // [*] : 0..8
cond r455 then 18 else 17
17: r459 := const 2 // 0..8 => 2
r457 := memset r459 length r425
jump 18
18: r460 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r461 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r462 := const 1 // -2^31..2^31-1 => 1
r464 := sub r461 - r462 // -2^31..2^31-1 => -1..2147483646
r465 := const 0 // -2^31..2^31-1 => 0
r466 := const 1 // 0..1 => 1
r467 := range length left r464 right r465 dir r466 // #
r468 := uarray len r458 dim 0 // #
length check left r467 == right r468 locus r460
r469 := const 8 // 0..15 => 8
r470 := index record147 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r471 := record ref r470 field 0 // @<0..8> => 0..8
r472 := const 24 // # => 24
r471 := copy r451 count r472
r473 := record ref r470 field 1 // @<[*] : 0..8> => 0..8
r474 := uarray left r458 dim 0 // #
r475 := uarray right r458 dim 0 // #
r476 := uarray dir r458 dim 0 // 0..1
r477 := unwrap r458 // @<0..8> => 0..8
r478 := wrap r477 [r474 r475 r476] // [*] : 0..8
r473 := store indirect r478
r479 := record ref r470 field 2 // @<0..15> => 0..15
r479 := store indirect r469
r480 := record ref r470 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r480 := store indirect r462
r481 := record ref r470 field 4 // @<0..1> => 0..1
r481 := store indirect r466
r483 := uarray left r104 dim 0 // #
r484 := cast r483 // 0..15
r485 := sub r484 - r469 // 0..15 => -8..7
r486 := sub r469 - r484 // 0..15 => -7..8
r487 := uarray dir r104 dim 0 // 0..1
r488 := select r487 then r485 else r486 // 0..15
r489 := cast r488 // # => 0..15
r490 := array ref r103 offset r489 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r490 := copy r470
r491 := const 2 // 0..8 => 2
r492 := const [r491]*24 // [24] : 0..8 => 0..8
r493 := address of r492 // @<0..8> => 0..8
r497 := cmp r465 > r464
r499 := alloc r467 // @<0..8> => 0..8
r500 := wrap r499 [r464 r465 r466] // [*] : 0..8
cond r497 then 20 else 19
19: r501 := const 2 // 0..8 => 2
r499 := memset r501 length r467
jump 20
20: r502 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r503 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r504 := const 1 // -2^31..2^31-1 => 1
r506 := sub r503 - r504 // -2^31..2^31-1 => -1..2147483646
r507 := const 0 // -2^31..2^31-1 => 0
r508 := const 1 // 0..1 => 1
r509 := range length left r506 right r507 dir r508 // #
r510 := uarray len r500 dim 0 // #
length check left r509 == right r510 locus r502
r511 := const 9 // 0..15 => 9
r512 := index record148 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r513 := record ref r512 field 0 // @<0..8> => 0..8
r514 := const 24 // # => 24
r513 := copy r493 count r514
r515 := record ref r512 field 1 // @<[*] : 0..8> => 0..8
r516 := uarray left r500 dim 0 // #
r517 := uarray right r500 dim 0 // #
r518 := uarray dir r500 dim 0 // 0..1
r519 := unwrap r500 // @<0..8> => 0..8
r520 := wrap r519 [r516 r517 r518] // [*] : 0..8
r515 := store indirect r520
r521 := record ref r512 field 2 // @<0..15> => 0..15
r521 := store indirect r511
r522 := record ref r512 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r522 := store indirect r504
r523 := record ref r512 field 4 // @<0..1> => 0..1
r523 := store indirect r508
r525 := uarray left r104 dim 0 // #
r526 := cast r525 // 0..15
r527 := sub r526 - r511 // 0..15 => -9..6
r528 := sub r511 - r526 // 0..15 => -6..9
r529 := uarray dir r104 dim 0 // 0..1
r530 := select r529 then r527 else r528 // 0..15
r531 := cast r530 // # => 0..15
r532 := array ref r103 offset r531 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r532 := copy r512
r533 := const 2 // 0..8 => 2
r534 := const [r533]*24 // [24] : 0..8 => 0..8
r535 := address of r534 // @<0..8> => 0..8
r539 := cmp r507 > r506
r541 := alloc r509 // @<0..8> => 0..8
r542 := wrap r541 [r506 r507 r508] // [*] : 0..8
cond r539 then 22 else 21
21: r543 := const 2 // 0..8 => 2
r541 := memset r543 length r509
jump 22
22: r544 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r545 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r546 := const 1 // -2^31..2^31-1 => 1
r548 := sub r545 - r546 // -2^31..2^31-1 => -1..2147483646
r549 := const 0 // -2^31..2^31-1 => 0
r550 := const 1 // 0..1 => 1
r551 := range length left r548 right r549 dir r550 // #
r552 := uarray len r542 dim 0 // #
length check left r551 == right r552 locus r544
r553 := const 10 // 0..15 => 10
r554 := index record149 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r555 := record ref r554 field 0 // @<0..8> => 0..8
r556 := const 24 // # => 24
r555 := copy r535 count r556
r557 := record ref r554 field 1 // @<[*] : 0..8> => 0..8
r558 := uarray left r542 dim 0 // #
r559 := uarray right r542 dim 0 // #
r560 := uarray dir r542 dim 0 // 0..1
r561 := unwrap r542 // @<0..8> => 0..8
r562 := wrap r561 [r558 r559 r560] // [*] : 0..8
r557 := store indirect r562
r563 := record ref r554 field 2 // @<0..15> => 0..15
r563 := store indirect r553
r564 := record ref r554 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r564 := store indirect r546
r565 := record ref r554 field 4 // @<0..1> => 0..1
r565 := store indirect r550
r567 := uarray left r104 dim 0 // #
r568 := cast r567 // 0..15
r569 := sub r568 - r553 // 0..15 => -10..5
r570 := sub r553 - r568 // 0..15 => -5..10
r571 := uarray dir r104 dim 0 // 0..1
r572 := select r571 then r569 else r570 // 0..15
r573 := cast r572 // # => 0..15
r574 := array ref r103 offset r573 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r574 := copy r554
r575 := const 2 // 0..8 => 2
r576 := const [r575]*24 // [24] : 0..8 => 0..8
r577 := address of r576 // @<0..8> => 0..8
r581 := cmp r549 > r548
r583 := alloc r551 // @<0..8> => 0..8
r584 := wrap r583 [r548 r549 r550] // [*] : 0..8
cond r581 then 24 else 23
23: r585 := const 2 // 0..8 => 2
r583 := memset r585 length r551
jump 24
24: r586 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r587 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r588 := const 1 // -2^31..2^31-1 => 1
r590 := sub r587 - r588 // -2^31..2^31-1 => -1..2147483646
r591 := const 0 // -2^31..2^31-1 => 0
r592 := const 1 // 0..1 => 1
r593 := range length left r590 right r591 dir r592 // #
r594 := uarray len r584 dim 0 // #
length check left r593 == right r594 locus r586
r595 := const 11 // 0..15 => 11
r596 := const 2 // -2^31..2^31-1 => 2
r597 := index record150 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r598 := record ref r597 field 0 // @<0..8> => 0..8
r599 := const 24 // # => 24
r598 := copy r577 count r599
r600 := record ref r597 field 1 // @<[*] : 0..8> => 0..8
r601 := uarray left r584 dim 0 // #
r602 := uarray right r584 dim 0 // #
r603 := uarray dir r584 dim 0 // 0..1
r604 := unwrap r584 // @<0..8> => 0..8
r605 := wrap r604 [r601 r602 r603] // [*] : 0..8
r600 := store indirect r605
r606 := record ref r597 field 2 // @<0..15> => 0..15
r606 := store indirect r595
r607 := record ref r597 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r607 := store indirect r596
r608 := record ref r597 field 4 // @<0..1> => 0..1
r608 := store indirect r592
r610 := uarray left r104 dim 0 // #
r611 := cast r610 // 0..15
r612 := sub r611 - r595 // 0..15 => -11..4
r613 := sub r595 - r611 // 0..15 => -4..11
r614 := uarray dir r104 dim 0 // 0..1
r615 := select r614 then r612 else r613 // 0..15
r616 := cast r615 // # => 0..15
r617 := array ref r103 offset r616 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r617 := copy r597
r618 := const 2 // 0..8 => 2
r619 := const [r618]*24 // [24] : 0..8 => 0..8
r620 := address of r619 // @<0..8> => 0..8
r624 := cmp r591 > r590
r626 := alloc r593 // @<0..8> => 0..8
r627 := wrap r626 [r590 r591 r592] // [*] : 0..8
cond r624 then 26 else 25
25: r628 := const 2 // 0..8 => 2
r626 := memset r628 length r593
jump 26
26: r629 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r630 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r631 := const 1 // -2^31..2^31-1 => 1
r633 := sub r630 - r631 // -2^31..2^31-1 => -1..2147483646
r634 := const 0 // -2^31..2^31-1 => 0
r635 := const 1 // 0..1 => 1
r636 := range length left r633 right r634 dir r635 // #
r637 := uarray len r627 dim 0 // #
length check left r636 == right r637 locus r629
r638 := const 12 // 0..15 => 12
r639 := const 0 // 0..1 => 0
r640 := index record151 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r641 := record ref r640 field 0 // @<0..8> => 0..8
r642 := const 24 // # => 24
r641 := copy r620 count r642
r643 := record ref r640 field 1 // @<[*] : 0..8> => 0..8
r644 := uarray left r627 dim 0 // #
r645 := uarray right r627 dim 0 // #
r646 := uarray dir r627 dim 0 // 0..1
r647 := unwrap r627 // @<0..8> => 0..8
r648 := wrap r647 [r644 r645 r646] // [*] : 0..8
r643 := store indirect r648
r649 := record ref r640 field 2 // @<0..15> => 0..15
r649 := store indirect r638
r650 := record ref r640 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r650 := store indirect r631
r651 := record ref r640 field 4 // @<0..1> => 0..1
r651 := store indirect r639
r653 := uarray left r104 dim 0 // #
r654 := cast r653 // 0..15
r655 := sub r654 - r638 // 0..15 => -12..3
r656 := sub r638 - r654 // 0..15 => -3..12
r657 := uarray dir r104 dim 0 // 0..1
r658 := select r657 then r655 else r656 // 0..15
r659 := cast r658 // # => 0..15
r660 := array ref r103 offset r659 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r660 := copy r640
r661 := const 2 // 0..8 => 2
r662 := const [r661]*24 // [24] : 0..8 => 0..8
r663 := address of r662 // @<0..8> => 0..8
r667 := cmp r634 > r633
r669 := alloc r636 // @<0..8> => 0..8
r670 := wrap r669 [r633 r634 r635] // [*] : 0..8
cond r667 then 28 else 27
27: r671 := const 2 // 0..8 => 2
r669 := memset r671 length r636
jump 28
28: r672 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r673 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r674 := const 1 // -2^31..2^31-1 => 1
r676 := sub r673 - r674 // -2^31..2^31-1 => -1..2147483646
r677 := const 0 // -2^31..2^31-1 => 0
r678 := const 1 // 0..1 => 1
r679 := range length left r676 right r677 dir r678 // #
r680 := uarray len r670 dim 0 // #
length check left r679 == right r680 locus r672
r681 := const 13 // 0..15 => 13
r682 := const 2 // -2^31..2^31-1 => 2
r683 := index record152 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r684 := record ref r683 field 0 // @<0..8> => 0..8
r685 := const 24 // # => 24
r684 := copy r663 count r685
r686 := record ref r683 field 1 // @<[*] : 0..8> => 0..8
r687 := uarray left r670 dim 0 // #
r688 := uarray right r670 dim 0 // #
r689 := uarray dir r670 dim 0 // 0..1
r690 := unwrap r670 // @<0..8> => 0..8
r691 := wrap r690 [r687 r688 r689] // [*] : 0..8
r686 := store indirect r691
r692 := record ref r683 field 2 // @<0..15> => 0..15
r692 := store indirect r681
r693 := record ref r683 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r693 := store indirect r682
r694 := record ref r683 field 4 // @<0..1> => 0..1
r694 := store indirect r678
r696 := uarray left r104 dim 0 // #
r697 := cast r696 // 0..15
r698 := sub r697 - r681 // 0..15 => -13..2
r699 := sub r681 - r697 // 0..15 => -2..13
r700 := uarray dir r104 dim 0 // 0..1
r701 := select r700 then r698 else r699 // 0..15
r702 := cast r701 // # => 0..15
r703 := array ref r103 offset r702 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r703 := copy r683
r704 := const 2 // 0..8 => 2
r705 := const [r704]*24 // [24] : 0..8 => 0..8
r706 := address of r705 // @<0..8> => 0..8
r710 := cmp r677 > r676
r712 := alloc r679 // @<0..8> => 0..8
r713 := wrap r712 [r676 r677 r678] // [*] : 0..8
cond r710 then 30 else 29
29: r714 := const 2 // 0..8 => 2
r712 := memset r714 length r679
jump 30
30: r715 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r716 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r717 := const 1 // -2^31..2^31-1 => 1
r719 := sub r716 - r717 // -2^31..2^31-1 => -1..2147483646
r720 := const 0 // -2^31..2^31-1 => 0
r721 := const 1 // 0..1 => 1
r722 := range length left r719 right r720 dir r721 // #
r723 := uarray len r713 dim 0 // #
length check left r722 == right r723 locus r715
r724 := const 14 // 0..15 => 14
r725 := const 2 // -2^31..2^31-1 => 2
r726 := index record153 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r727 := record ref r726 field 0 // @<0..8> => 0..8
r728 := const 24 // # => 24
r727 := copy r706 count r728
r729 := record ref r726 field 1 // @<[*] : 0..8> => 0..8
r730 := uarray left r713 dim 0 // #
r731 := uarray right r713 dim 0 // #
r732 := uarray dir r713 dim 0 // 0..1
r733 := unwrap r713 // @<0..8> => 0..8
r734 := wrap r733 [r730 r731 r732] // [*] : 0..8
r729 := store indirect r734
r735 := record ref r726 field 2 // @<0..15> => 0..15
r735 := store indirect r724
r736 := record ref r726 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r736 := store indirect r725
r737 := record ref r726 field 4 // @<0..1> => 0..1
r737 := store indirect r721
r739 := uarray left r104 dim 0 // #
r740 := cast r739 // 0..15
r741 := sub r740 - r724 // 0..15 => -14..1
r742 := sub r724 - r740 // 0..15 => -1..14
r743 := uarray dir r104 dim 0 // 0..1
r744 := select r743 then r741 else r742 // 0..15
r745 := cast r744 // # => 0..15
r746 := array ref r103 offset r745 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r746 := copy r726
r747 := const 2 // 0..8 => 2
r748 := const [r747]*24 // [24] : 0..8 => 0..8
r749 := address of r748 // @<0..8> => 0..8
r753 := cmp r720 > r719
r755 := alloc r722 // @<0..8> => 0..8
r756 := wrap r755 [r719 r720 r721] // [*] : 0..8
cond r753 then 32 else 31
31: r757 := const 2 // 0..8 => 2
r755 := memset r757 length r722
jump 32
32: r758 := debug locus DESIGN_LIB.EEPROM_PKG+1506 // D<>
r759 := load C_MAX_ADDR_WIDTH // -2^31..2^31-1 => 0..2^31-1
r760 := const 1 // -2^31..2^31-1 => 1
r762 := sub r759 - r760 // -2^31..2^31-1 => -1..2147483646
r763 := const 0 // -2^31..2^31-1 => 0
r764 := const 1 // 0..1 => 1
r765 := range length left r762 right r763 dir r764 // #
r766 := uarray len r756 dim 0 // #
length check left r765 == right r766 locus r758
r767 := const 15 // 0..15 => 15
r768 := const 2 // -2^31..2^31-1 => 2
r769 := index record154 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}>
r770 := record ref r769 field 0 // @<0..8> => 0..8
r771 := const 24 // # => 24
r770 := copy r749 count r771
r772 := record ref r769 field 1 // @<[*] : 0..8> => 0..8
r773 := uarray left r756 dim 0 // #
r774 := uarray right r756 dim 0 // #
r775 := uarray dir r756 dim 0 // 0..1
r776 := unwrap r756 // @<0..8> => 0..8
r777 := wrap r776 [r773 r774 r775] // [*] : 0..8
r772 := store indirect r777
r778 := record ref r769 field 2 // @<0..15> => 0..15
r778 := store indirect r767
r779 := record ref r769 field 3 // @<-2^31..2^31-1> => -2^31..2^31-1
r779 := store indirect r768
r780 := record ref r769 field 4 // @<0..1> => 0..1
r780 := store indirect r764
r782 := uarray left r104 dim 0 // #
r783 := cast r782 // 0..15
r784 := sub r783 - r767 // 0..15 => -15..0
r785 := sub r767 - r783 // 0..15
r786 := uarray dir r104 dim 0 // 0..1
r787 := select r786 then r784 else r785 // 0..15
r788 := cast r787 // # => 0..15
r789 := array ref r103 offset r788 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r789 := copy r769
r790 := unwrap r104 // @<DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}> => DESIGN_LIB.EEPROM_PKG.T_DATA_SEGMENT{}
r794 := uarray right r104 dim 0 // #
r795 := cast r794 // 0..15
r796 := range null left r783 right r795 dir r786 // 0..1
cond r796 then 34 else 33
33: jump 34
34: r103 := copy r790 count r8
return
Is the value of GC_SAMPLES_PER_BIT
derived from that package in some way?
No, it is a literal constant set in a generic two levels up. I now realized I have a module testbench of this block (the crash happens running on top level), but running the module test does not crate a crash. The generic value, code and the debug printouts are the same.
But I now see that the traceback is different on windows and linux. If I add fmt_loc(stdout, tree_loc(expr));
in eval_try_fold
I instead get another last one that is in that package.
When recreating that one I get the error.
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.math_real.all;
package top_pkg is
function log2_ceil (
val: natural)
return natural;
end package top_pkg;
package body top_pkg is
function log2_ceil (
val: natural)
return natural is
begin
return integer(ceil(log2(real(val) + 1.0)));
end function log2_ceil;
end package body top_pkg;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.top_pkg.log2_ceil;
package test_pkg is
type t_segment_type is (
VERSION_NUMBER
);
constant C_MAX_WORD_LENGTH : natural := 3;
constant C_MAX_ADDR_WIDTH : natural := log2_ceil(4095);
type t_data_segment is record
word_idx : unsigned(C_MAX_ADDR_WIDTH - 1 downto 0);
word_length : natural range 0 to C_MAX_WORD_LENGTH;
end record t_data_segment;
type t_data_segment_template is array(t_segment_type) of t_data_segment;
constant C_SEGMENT_RECORDS : t_data_segment_template := (
VERSION_NUMBER => t_data_segment'(
word_idx => (others => '0'),
word_length => 1)
);
end package;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.test_pkg.all;
entity test is
end entity test;
architecture beh of test is
signal segment_word : t_data_segment;
begin
b_block : block is
signal calib_version_tmp : std_logic_vector(C_SEGMENT_RECORDS(VERSION_NUMBER).word_length * 8 - 1 downto 0);
begin
process
begin
report "OK 2";
wait;
end process;
end block;
end architecture beh;
I can confirm that if I add `fmt_loc(stdout, tree_loc(expr)); in eval_do_fold :187 on linux , the last line that is indicated is the same as on windows when I run thw original testbench, which is the line that is recreated in the last MWE. So there is just a difference in the traceback.
That's great, thank you very much for providing the small reproducer! I think this should be fixed now, could you test again?
Thanks for the quick fix, it works now on both linux and windows.
I get this in a big project I haven't tested in a while with NVC. From the UVVM printout at the start it seems it started simulating.
This was on Windows, I get something similar on Linux.