nickg / nvc

VHDL compiler and simulator
https://www.nickg.me.uk/nvc/
GNU General Public License v3.0
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Regression on aggregate bounds #874

Closed Anselmo95 closed 3 months ago

Anselmo95 commented 3 months ago

Hello,

As mentioned in the issue #873 the recent commit bd8183051c1f24b612c2cf46929069aa3f928c44 introduced some regression.

It was luckily easy to find and here is a reproducer:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity ent is
end entity ent;

architecture arch of ent is
    constant A : natural := 15;
    constant B : natural := A-1;
    type array1 is array (0 to 3) of std_logic_vector(A-1 downto 0);
    signal s1 : array1 := (others => (others => '0'));
begin
    process
    begin
        -- if s1 /= (0 to 3 => (14 downto 0 => '0')) then -- OK
        -- if s1 /= (0 to 3 => (B downto 0 => '0')) then -- Crash
        if s1 /= (0 to 3 => (A-1 downto 0 => '0')) then -- Crash
            report "KO";
        else
            report "OK";
        end if;
        wait;
    end process;
end architecture arch;

It seems that any type of maths operation inside the second range assignment is causing the problem