AMD A6-5200 APU

[fiskvik]

I realize it's been a while since you worked on this.

After I changed static DEFINE_PCI_DEVICE_TABLE(amd_gpio_pci_tbl) = { to static const struct pci_device_id amd_gpio_pci_tbl[] = { on line 281, it compiles. When I insert the module, I can 'export' a bunch of gpio pins, uhm, but I'm not sure it's actually working, since I can't find any input. Is this likely to work on a AMD A6-5200 APU at all?

Thank you.

[nkaminski]

It will be extraordinary difficult to tell if this is working unless you know where the gpio lines are actually broken out on the particular board that the apu is installed in. Do you have schematics or other documentation for the system in question?

On April 4, 2017 4:42:32 PM CDT, torstefi notifications@github.com wrote:

I realize it's been a while since you worked on this.

After I changed static DEFINE_PCI_DEVICE_TABLE(amd_gpio_pci_tbl) = { to static const struct pci_device_id amd_gpio_pci_tbl[] = { on line 281, it compiles. When I insert the module, I can 'export' a bunch of gpio pins, uhm, but I'm not sure it's actually working, since I can't find any input. Is this likely to work on a AMD A6-5200 APU at all?

Thank you.

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[fiskvik]

I don't have a lot of documentation. I bought a few boards as samples from a factory in China. A couple that are GX-217GA based, and one of a newer rev. that's AMD A6-5200 based. This last one is quite a bit faster, so that's the one I'd like to use for my timeserver. Because the serial ports on the board are only GND+IN+OUT, I thought I might try to get a GPS timepulse in over GPIO. I asked the factory for documentation, but I didn't get a lot besides a demo binary for Windows (I havent tested this yet). I do have this:

⦁ Pin corresponding address = Base（FED80100）+ GPIO Offset

`GPIO60 = FED8013C（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO61 = FED8013D（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO62 = FED8013E（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO63 = FED8013F（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO65 = FED80141（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO55 = FED80137（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO57 = FED80139（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO58 = FED8013A（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V

⦁ Program example： ⦁ Example: GPIO60. 1.1 Setting GPIO60 as “input” function: WriteMemory(0xFED8013C, 0x20) // setting GPIO60 as input. Byte8=ReadMemory(0xFED8013C) If(Byte8 == 0xA0) { // GPIO60 External 3.3V Level } If(Byte8 == 0x20) { // GPIO60 External 0V Level } 1.2 Setting GPIO60 as “Output” function WriteMemory(0xFED8013C, 0x78) // setting GPIO60 as 0V low level WriteMemory(0xFED8013C, 0xF0) // Setting GPIO60 as 3.3V high level

1.3 For other GPIO, only need to change “0xFED8013C” address to a corresponding address. ` Thank you so much for your help! I really appreciate it, even though I realize you'll probably not be able to help me, given that I've got basically zero documentation.

[nkaminski]

So you know the operation codes and base address but do you know what physical pin on the apu is wired to the in and out pins on the board?

On April 4, 2017 5:34:25 PM CDT, torstefi notifications@github.com wrote:

I don't have a lot of documentation. I bought a few boards as samples from a factory in China. A couple that are GX-217GA based, and one of a newer rev. that's AMD A6-5200 based. This last one is quite a bit faster, so that's the one I'd like to use for my timeserver. Because the serial ports on the board are only GND+IN+OUT, I thought I might try to get a GPS timepulse in over GPIO. I asked the factory for documentation, but I didn't get a lot besides a demo binary for Windows (I havent tested this yet). I do have this:

⦁ Pin corresponding address = Base（FED80100）+ GPIO Offset

`GPIO60 = FED8013C（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO61 = FED8013D（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO62 = FED8013E（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO63 = FED8013F（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO65 = FED80141（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO55 = FED80137（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO57 = FED80139（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V GPIO58 = FED8013A（Address） = 0x78 is low level 0V = 0xF0 is high level 3.3V

⦁ Program example： ⦁ Example: GPIO60. 1.1 Setting GPIO60 as “input” function: WriteMemory(0xFED8013C, 0x20) // setting GPIO60 as input. Byte8=ReadMemory(0xFED8013C) If(Byte8 == 0xA0) { // GPIO60 External 3.3V Level } If(Byte8 == 0x20) { // GPIO60 External 0V Level } 1.2 Setting GPIO60 as “Output” function WriteMemory(0xFED8013C, 0x78) // setting GPIO60 as 0V low level WriteMemory(0xFED8013C, 0xF0) // Setting GPIO60 as 3.3V high level

1.3 For other GPIO, only need to change “0xFED8013C” address to a corresponding address. `

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[fiskvik]

Well, there's no way to see that. I've asked for the information, but the person I'm in touch with is not an engineer, and that kind of information is not forthcoming. What I posted is what I got when I asked for documentation on GPIO. Thanks anyway! :)

[fiskvik]

Ugh, this is incredibly frustrating. There's this childish secrecy surrounding the programming information. AMD's site is full of PDFs, but it's 100% marketing, and no technical information. I can't even find out how many GPIO pins are on the SOC.

[nkaminski]

It will be more difficult and time consuming, however reverse engineering is an option. As guidance, I would write a simple program in C that mmap()'s the base address of that gpio controller, sets all pins as input, and cycles through printing the value of all of the gpio pins. With that program running, apply a test signal to one of the supposed GPIO pins in question and I would advise a 330 or 470 ohm series resistor as well to limit current in case of accidental logic contention. If a pin is indeed a gpio, it should be quite evident since you will see the read value change for a particular gpio in your test program.

Nash Kaminski

On April 5, 2017 3:53:32 AM CDT, torstefi notifications@github.com wrote:

Ugh, this is incredibly frustrating. There's this childish secrecy surrounding the programming information. AMD's site is full of PDFs, but it's 100% marketing, and no technical information. I can't even find out how many GPIO pins are on the SOC.

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[fiskvik]

Hehe, this is excellent advice, except I haven't really coded C in 7 years! I guess that should be doable, thank you. Just one more thing; you do think that this driver should work though, or will I have to change the C code with the base address and the operation codes? I could see no obvious constants in the .h file. Thanks a million for your help. I would have had no way of accomplishing this if you hadn't posted this code to GitHub.

[fiskvik]

GPIO57 is wired to pin 5 and gives me the time signal! Now, I have to get it into ntp! Thank you so much!

[nkaminski]

Congrats on the reverse engineering effort! The only difficulty I foresee you having is if you want to use that pin as a PPS input, you will need interrupt support in order to be able to use the pps-gpio driver included with the Linux kernel. You may need to hack something together that uses high speed polling instead.

On April 5, 2017 4:03:08 PM CDT, torstefi notifications@github.com wrote:

GPIO57 is wired to pin 5 and gives me the time signal! Now, I have to get it into ntp! Thank you so much!

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[nkaminski]

This kernel driver also should work nearly vermatim since it uses indirect memory mapped IO via ACPI.

On April 5, 2017 9:54:06 AM CDT, torstefi notifications@github.com wrote:

Hehe, this is excellent advice, except I haven't really coded C in 7 years! I guess that should be doable, thank you. Just one more thing; you do think that this driver should work though, or will I have to change the C code with the base address and the operation codes? I could see no obvious constants in the .h file. Thanks a million for your help. I would have had no way of accomplishing this if you hadn't posted this code to GitHub.

-- You are receiving this because you commented. Reply to this email directly or view it on GitHub: https://github.com/nkaminski/amd-gseriessoc-gpio/issues/1#issuecomment-291887322

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