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nlsynth / karuta

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
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Parallel hardware #4

Open TenzinCHW opened 4 years ago

TenzinCHW commented 4 years ago

Hi, first I would like to thank the developers for this new HLS tool, it looks very simple to use and seems to have a lot of potential, so I'm excited to use it.

I'm trying to write an FPGA-based accelerator for a project, but I'm not sure how to instantiate multiple instances of a function (in hardware). Not sure if I have this right but the for loops don't seem to be unrolled into hardware. Do you have an example of how to do this?

yt76 commented 4 years ago

Thank you for your encouraging comment!

I'am afraid that loop unrolling is not implemented yet, but it should be interesting. I am going to implement it probably from next month or so.

Karuta's priority until now was to describe parallelism between threads (FSMs) and between objects (modules). Possible alternative solutions are to clone objects or to create a set of replica threads like:

  @(num=4)
  process f(threadIndex int) { // 4 FSMs are generated
    for var i = 0; ... { ... }
  }

However, this might cause some overhead by the arbitration between shared resources. So Please stay tuned for a while.

TenzinCHW commented 4 years ago

Ah okay haha yes I think I've tried to do that but the resulting verilog did not seem too efficient.

Alright then, I'll patiently await the arrival of the loop unrolling. Thank you so much for entertaining this request and please take care!