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nocrew / ostis

Atari ST Emulator
GNU Lesser General Public License v2.1
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Revert 2c wait in cpu_step_cycle until prefetch is handled the correct way #119

Closed stefanberndtsson closed 8 years ago

stefanberndtsson commented 8 years ago

Right now prefetch is implemented to make sure the next instruction is fetched before that memory is overwritten (self modification). This is an incomplete implementation.

In reality, every instruction should prefetch the next instruction as a state in its execution. The next instruction should then start immediately, not wait for the next 4c align (the opcode is already inside the CPU, so no time is needed).

The 2c align in cpu_step_cycle doesn't do this the right way. Since every (almost) instruction end on a 4c boundary, it will nearly cause a 2c gap between instructions, and also misalign the next one in all these cases.

Until prefetch is done right, it should remain 4c aligned, and just keep going as before.

larsbrinkhoff commented 8 years ago

I don't quite understand this, but I'll take your word for it.

larsbrinkhoff commented 8 years ago

Do you have some specific test cases which fail before this PR, and work after?

I know many things are not done correctly, but some things seem to work better without the enforces four-cycle alignment. E.g. Level 16 fullscreen now works with PSG accesses when using the new BCC.