Open yzhang93 opened 3 months ago
Or possibly supported in mlir-aie's aievec but not ours... @yzhang93 in the future feel free to tag me as well on aievec related issues since I "own" aievec in our/this plugin.
greping for ExtractStridedSliceOp
in mlir-aie gets no hits so I guess in fact it's not supported. We can discuss how to support (now/here/tomorrow/whenever).
Or possibly supported in mlir-aie's aievec but not ours... @yzhang93 in the future feel free to tag me as well on aievec related issues since I "own" aievec in our/this plugin.
Okay, sure! One related question, do we still have any dependency on MLIR-AIE in third_party?
Or possibly supported in mlir-aie's aievec but not ours... @yzhang93 in the future feel free to tag me as well on aievec related issues since I "own" aievec in our/this plugin.
Okay, sure! One related question, do we still have any dependency on MLIR-AIE in third_party?
Only op defs in tablegen https://github.com/nod-ai/iree-amd-aie/issues/430#issuecomment-2227174616
@yzhang93 sorry being n00b - can you give me the iree-opt
/iree-compile
args/CLI to repro?
I don't understand why there is a 7 here, can't the tile size be chosen larger (or smaller) to make it the size we want (4 or 8)? @yzhang93 @erwei-xilinx
My understanding is that the issue is the need for vector.extract_strided_slice
. Currently the input feature map data feeding into the cores are being laid out as <1xROWxInChan>
, where ROW are consecutive. So the core is trying to do the layout transform below, in order to capture a 4x8 input for vector intrinsic.
o o o o ... o o o o o ... o
x x x x o o o o ... o
o o o o o o o o ... o
x x x x -> o o o o ... o
o o o o
x x x x
o o o o
Maybe we could have the DMA do the above, so that the input data is already in our expected shape before feeding into the kernel?
I don't understand why there is a 7 here, can't the tile size be chosen larger (or smaller) to make it the size we want (4 or 8)? @yzhang93 @erwei-xilinx
This 7 comes from the input image width. Because we have the output width as multiple of 4 and this is a stride 2 Conv, the input width is the odd number.
I don't understand why there is a 7 here, can't the tile size be chosen larger (or smaller) to make it the size we want (4 or 8)? @yzhang93 @erwei-xilinx
This 7 comes from the input image width. Because we have the output width as multiple of 4 and this is a stride 2 Conv, the input width is the odd number.
Maybe I'm misunderstanding, but wouldn't a 8x8 slice do exactly the same? I understand that you wouldn't need the 8th <8xi8> one because you only actually use the 1st, 3rd, 5th, and 7th 64-bit sub-slice, but the hardware can only load 256-bit and 512-bit chunks of memory (and scalars, of course).
Ok, I think this can be solved by changing the padding at some level of the lowering
Conv2d with stride = 2 example:
Error:
Generated IR snippet:
@jsetoain It looks like
vector.extract_strided_slice
is not supported in aievec.