Closed JJR2 closed 10 years ago
I'm sorry but I can't do that. You have to look it up the meaning yourself in the datasheet: http://www.kosmodrom.com.ua/el/STM32-TFT/SSD1289.pdf
For instance
write_reg(par, 0x00, 0x0001);
means write the value 0x0001 to register 0x00. From datasheet: Oscillator (R00h) (POR = 0000h) bit 0 is OSCEN
The PowerOnReset value of that register is 0000h, so that statement enables the oscillator.
I found an earlier documented copy of the initialization: http://mbed.org/users/ttodorov/code/TFTLCD/file/26491d710e72/ssd1289.cpp
It gives better context for what's going into the registers than the list on the datasheet.
On 3/29/2014 7:34 AM, notro wrote:
I'm sorry but I can't do that. You have to look it up the meaning yourself in the datasheet: http://www.kosmodrom.com.ua/el/STM32-TFT/SSD1289.pdf
For instance
write_reg(par, 0x00, 0x0001);
means write the value 0x0001 to register 0x00. From datasheet: Oscillator (R00h) (POR = 0000h) bit 0 is OSCEN
The PowerOnReset value of that register is 0000h, so that statement enables the oscillator.
— Reply to this email directly or view it on GitHub https://github.com/notro/fbtft/issues/94#issuecomment-38998920.
Closing issue since there has been no activity for more than 2 months. Reopen if needed.
Could you please document the initializations for the SSD1289 in the init_display function in fb_ssd1289.c? It would be helpful to see in detail what the routine passes to the chip's registers.