nrf-rs / microbit

A Rust crate for BBC micro:bit development
BSD Zero Clause License
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Bump cortex-m-rt from 0.7.3 to 0.7.5 #161

Closed dependabot[bot] closed 2 weeks ago

dependabot[bot] commented 2 weeks ago

Bumps cortex-m-rt from 0.7.3 to 0.7.5.

Release notes

Sourced from cortex-m-rt's releases.

v0.7.5

Deprecated

  • the ptr() function on all peripherals register blocks in favor of the associated constant PTR (#386).

Changed

  • The inline-asm feature no longer requires a nightly Rust compiler, but does require Rust 1.59 or above.

Fixed

  • Fixed singleton!() statics sometimes ending up in .data instead of .bss (#364, #380). (Backported from upcoming 0.8 release).

v0.7.4 - 2021-12-31

Added

  • Added support for additional DWT counters (#349)
    • CPI counter
    • Exception overhead counter
    • LSU counter
    • Folded-instruction counter
  • Added DWT.set_cycle_count (#347).
  • Added support for the Cortex-M7 TCM and cache access control registers. There is a feature cm7 to enable access to these (#352).
  • Add derives for serde, Hash, and PartialOrd to VectActive behind feature gates for host-platform use (#363).
  • Support host platforms besides x86_64 (#369).
  • Added delay::Delay::with_source, a constructor that lets you specify the SysTick clock source (#374).

Fixed

  • Fix incorrect AIRCR PRIGROUP mask (#338, #339).
  • Fix nightly users of inline-asm breaking now that the asm macro is removed from the prelude (#372).

Deprecated

  • DWT::get_cycle_count has been deprecated in favor of DWT::cycle_count. This change was made for consistency with the C-GETTER convention. (#349)
Changelog

Sourced from cortex-m-rt's changelog.

[v0.7.5] - 2022-05-15

Deprecated

  • the ptr() function on all peripherals register blocks in favor of the associated constant PTR (#386).

Changed

  • The inline-asm feature no longer requires a nightly Rust compiler, but does require Rust 1.59 or above.

Fixed

  • Fixed singleton!() statics sometimes ending up in .data instead of .bss (#364, #380). (Backported from upcoming 0.8 release).

[v0.7.4] - 2021-12-31

Added

  • Added support for additional DWT counters (#349)
    • CPI counter
    • Exception overhead counter
    • LSU counter
    • Folded-instruction counter
  • Added DWT.set_cycle_count (#347).
  • Added support for the Cortex-M7 TCM and cache access control registers. There is a feature cm7 to enable access to these (#352).
  • Add derives for serde, Hash, and PartialOrd to VectActive behind feature gates for host-platform use (#363).
  • Support host platforms besides x86_64 (#369).
  • Added delay::Delay::with_source, a constructor that lets you specify the SysTick clock source (#374).

Fixed

  • Fix incorrect AIRCR PRIGROUP mask (#338, #339).
  • Fix nightly users of inline-asm breaking now that the asm macro is removed from the prelude (#372).

Deprecated

  • DWT::get_cycle_count has been deprecated in favor of DWT::cycle_count. This change was made for consistency with the C-GETTER convention. (#349)
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