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nthu-pllab / RISCV-DLR

This repository is a lightweight runtime for RISC-V utility.
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Some error about TVM target about riscv_cpu("spike") #3

Open Previousletters opened 3 years ago

Previousletters commented 3 years ago

Excuse me, I tried this example, but for my tvm it had an AttributeError called module 'tvm.target' has no attribute 'riscv_cpu'.

I also changed the target into llvm, but it also had errors when I used llc to made .ll into .s: LLVM ERROR: Cannot select: t122: v2i32 = vselect t124, t114, t176 t124: v2i32 = setcc t114, t176, setgt:ch t114: v2i32 = vselect t126, t104, t175 t126: v2i32 = setcc t104, t175, setlt:ch t104: v2i32,ch = load<(load 8 from %ir.uglygep910, align 16, !tbaa !90)> t170, t66, undef:i64 t66: i64 = add t4, Constant:i64<-44> t4: i64,ch = CopyFromReg t0, Register:i64 %3 t3: i64 = Register %3 t64: i64 = Constant<-44> t10: i64 = undef t175: v2i32 = RISCVISD::VINSERTT64_W Constant:i64<255>, Constant:i64<255> t72: i64 = Constant<255> t72: i64 = Constant<255> t104: v2i32,ch = load<(load 8 from %ir.uglygep910, align 16, !tbaa !90)> t170, t66, undef:i64 t66: i64 = add t4, Constant:i64<-44> t4: i64,ch = CopyFromReg t0, Register:i64 %3 t3: i64 = Register %3 t64: i64 = Constant<-44> t10: i64 = undef t175: v2i32 = RISCVISD::VINSERTT64_W Constant:i64<255>, Constant:i64<255> t72: i64 = Constant<255> t72: i64 = Constant<255> t176: v2i32 = RISCVISD::VINSERTT64_W Constant:i64<0>, Constant:i64<0> t70: i64 = Constant<0> t70: i64 = Constant<0> t114: v2i32 = vselect t126, t104, t175 t126: v2i32 = setcc t104, t175, setlt:ch t104: v2i32,ch = load<(load 8 from %ir.uglygep910, align 16, !tbaa !90)> t170, t66, undef:i64 t66: i64 = add t4, Constant:i64<-44> t4: i64,ch = CopyFromReg t0, Register:i64 %3 t3: i64 = Register %3 t64: i64 = Constant<-44> t10: i64 = undef t175: v2i32 = RISCVISD::VINSERTT64_W Constant:i64<255>, Constant:i64<255> t72: i64 = Constant<255> t72: i64 = Constant<255> t104: v2i32,ch = load<(load 8 from %ir.uglygep910, align 16, !tbaa !90)> t170, t66, undef:i64 t66: i64 = add t4, Constant:i64<-44> t4: i64,ch = CopyFromReg t0, Register:i64 %3 t3: i64 = Register %3 t64: i64 = Constant<-44> t10: i64 = undef t175: v2i32 = RISCVISD::VINSERTT64_W Constant:i64<255>, Constant:i64<255> t72: i64 = Constant<255> t72: i64 = Constant<255> t176: v2i32 = RISCVISD::VINSERTT64_W Constant:i64<0>, Constant:i64<0> t70: i64 = Constant<0> t70: i64 = Constant<0> In function: fused_clip_compute_

So, how can I solve this error ? Please.