Clock state for integration grid and block band structure in FESD

[nurkanovic]

Currently, we have for every FE an h. Alternatively, we can define a clock state t, and have a "control variable" hn to determine the length of a finite element. We simply integrate the clock state as t{n+1} = t_n + h_n; and enforce a "terminal" constraint t_N = T_final instead of sum_n h_n = T_final The intermediate variables t_n help eliminate sum_n h_n = T_final, which kills the block banded structure.

[nurkanovic]

remark: This clock state trick is commonly used in "switching time optimization" formulations in mixed integer optimal control.