ghost
commented
6 years ago You need to be careful about what you are defining in .spec files. These files are used by GCC text preprocessor and if some macro matches Verilog style `ifdefs GCC will stupidly substitute it...
BTW. in the HEAD source it is #ifdef not `ifdef, did you replace it on your own?
Hello, I meet some problem on build a lower cost HW. When I give some lower spec like nv small http://nvdla.org/hw/v2/scalability.html
after tmake build vmod,
there are some error in the RTL code about missing macro name
For example, there are none define constraints in the ifdef `ifdef NV_NVDLA_cdp u_NV_NVDLA_cdp ( .dla_clk_ovr_on_sync (dla_clk_ovr_on_sync) //|< w ,.global_clk_ovr_on_sync (global_clk_ovr_on_sync) //|< w ,.tmc2slcg_disable_clock_gating (tmc2slcg_disable_clock_gating) //|< i ,.nvdla_core_clk (nvdla_core_clk) //|< i ,.nvdla_core_rstn (nvdla_core_rstn) //|< o ,.cdp2csb_resp_valid (cdp2csb_resp_valid) //|> w ,.cdp2csb_resp_pd (cdp2csb_resp_pd[33:0]) //|> w ,.cdp2cvif_rd_cdt_lat_fifo_pop (cdp2cvif_rd_cdt_lat_fifo_pop) //|> w ,.cdp2cvif_rd_req_valid (cdp2cvif_rd_req_valid) //|> w ,.cdp2cvif_rd_req_ready (cdp2cvif_rd_req_ready) //|< w ,.cdp2cvif_rd_req_pd (cdp2cvif_rd_req_pd[78:0]) //|> w ,.cdp2cvif_wr_req_valid (cdp2cvif_wr_req_valid) //|> w ,.cdp2cvif_wr_req_ready (cdp2cvif_wr_req_read
Do you have the similar problem? Or how to give a more appropriate spec?
Thank you!