Verilator cannot be used for master branch

[liuhengibm]

I can use the verilator testbench in v1 branch. But when I turned to the master branch and execute the ./tools/bin/tmake -build verilator command trying to build simulator, it generates the following log information:

TMAKE: building nv_small in spec/defs TMAKE: building nv_small in spec/manual TMAKE: building nv_small in spec/odif TMAKE: building nv_small in vmod/vlibs TMAKE: building nv_small in vmod/include TMAKE: building nv_small in vmod/rams/model TMAKE: building nv_small in vmod/rams/synth TMAKE: building nv_small in vmod/nvdla/apb2csb TMAKE: building nv_small in vmod/nvdla/cdma TMAKE: building nv_small in vmod/nvdla/cbuf TMAKE: building nv_small in vmod/nvdla/csc TMAKE: building nv_small in vmod/nvdla/cmac TMAKE: building nv_small in vmod/nvdla/cacc TMAKE: building nv_small in vmod/nvdla/sdp TMAKE: building nv_small in vmod/nvdla/pdp TMAKE: building nv_small in vmod/nvdla/cfgrom TMAKE: building nv_small in vmod/nvdla/cdp TMAKE: building nv_small in vmod/nvdla/bdma TMAKE: building nv_small in vmod/nvdla/rubik TMAKE: building nv_small in vmod/nvdla/car TMAKE: building nv_small in vmod/nvdla/glb TMAKE: building nv_small in vmod/nvdla/csb_master TMAKE: building nv_small in vmod/nvdla/nocif TMAKE: building nv_small in vmod/nvdla/retiming TMAKE: building nv_small in vmod/nvdla/top TMAKE: building nv_small in verif/verilator

This is the same log information when I executes ./tools/bin/tmake -build vmod. Seems it builds RTL, but does not build simulator. And when I continue to execute the "make run TEST=sanity0" command, the following error is reported: make: *** No rule to make target ../../outdir/nv_small/verilator/test/sanity0/trace.bin', needed byrun'. Stop.

So does verilator testbench work for master branch? Or we can only use vcs in master branch? @jwise @zdraw

[ghost]

In master branch all Verilator tests for nv_small are in <root>/verif/tests/trace_tests/nv_small. So that would be something like: make run TEST=dc_24x33x55_5x5x55x25_int8_0. I tested them all and only few did not pass CRC check.

[liuhengibm]

Thanks for the quick answer! By the way, does the verilator testbench and vcs testbench share the same testcases? Another question: I can see 3 example configuration(nv_large.spec, nv_small_256.spec and nv_small.spec) in master, can we only use these 3 configuration or can we give different configuration by our-self? @mmaciag

[ghost]

Sorry, I am not maintainer/contributor so my knowledge is limited to what I already learned on this project. I work with Xilinx tools to run nv_small on FPGA and never touched vcs. AFAIK verilator tests are very limited when compared to vcs tests.

As for your second question, see: #145 - it seems that configurations other than nv_small are not yet ready to use.

[terencebetter]

Hi, so you finished verilator test for nv_small model right? I'm building the verilator test now, but got some error like following: do you have any idea with that?

%Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/nocif/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/nocif/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/nocif/RAMDP_8X66_GL_M1_E2.sv %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/pdp/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/pdp/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/pdp/RAMDP_8X66_GL_M1_E2.sv %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/retiming/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/retiming/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/retiming/RAMDP_8X66_GL_M1_E2.sv %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/rubik/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/rubik/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/rubik/RAMDP_8X66_GL_M1_E2.sv %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/sdp/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/sdp/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/sdp/RAMDP_8X66_GL_M1_E2.sv %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/top/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/top/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/top/RAMDP_8X66_GL_M1_E2.sv %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/csb_master/RAMDP_8X66_GL_M1_E2 %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/csb_master/RAMDP_8X66_GL_M1_E2.v %Error: ../../outdir/nv_small/vmod/rams/synth/nv_ram_rwsp_8x65_logic.v:348: ../../outdir/nv_small/vmod/nvdla/csb_master/RAMDP_8X66_GL_M1_E2.sv %Error: Exiting due to too many errors encountered; --error-limit=50 %Error: Command Failed /usr/local/bin/verilator_bin --compiler clang --output-split 250000000 --cc --exe -f verilator_nv_small.f --Mdir ../../outdir/nv_small/verilator/ nvdla.cpp --compiler clang --output-split 250000000 make: *** [../../outdir/nv_small/verilator/VNV_nvdla.mk] Error 10 Died at ./tools/bin/tmake line 254.

BTW, I can successfully build nv_full verilator tests. in v1

Thanks!@mmaciag @liuhengibm

[liuhengibm]

RAMDP_8X66_GL_M1_E2.v is not included in the verilator_nv_small.f filelist. You can add "-v ../../outdir/nv_small/vmod/rams/model/RAMDP_8X66_GL_M1_E2.v" to verif/verilator/verilator_nv_small.f and try again.

[terencebetter]

Problem solved! Thanks!

[qaziullah]

Hi @liuhengibm and @terencebetter files.zip

I am also getting error for running ./tools/bin/tmake -build verilator. I have added "-v ../../outdir/nv_small/vmod/rams/model/RAMDP_8X66_GL_M1_E2.v" to the verilator_nv_small.f file. the file can be found here.

Starting few lines of the nv_small_verilator.log file are shared below. Full file can be found here.

command: cd verif/verilator;make PROJECT=nv_small /usr/bin/verilator --compiler clang --output-split 250000000 --cc --exe -f verilator_nv_small.f --Mdir ../../outdir/nv_small/verilator/ nvdla.cpp --compiler clang --output-split 250000000 %Warning-REDEFMACRO: ../../outdir/nv_small/vmod/nvdla/top/NV_nvdla.v:35: Redefining existing define: 'DESIGNWARE_NOEXIST', with different value: 1 ... Use "/ verilator lint_off REDEFMACRO /" and lint_on around source to disable this message. %Warning-REDEFMACRO: Previous definition is here, with value: %Warning-PINMISSING: ../../outdir/nv_small/vmod/nvdla/nocif/NV_NVDLA_mcif.v:265: Cell has missing pin: 'reg2dp_rd_weight_bdma' NV_NVDLA_MCIF_csb u_csb ( ^~~~~ ../../outdir/nv_small/vmod/nvdla/top/NV_NVDLA_partition_o.v:557: ... note: In file included from NV_NVDLA_partition_o.v ../../outdir/nv_small/vmod/nvdla/top/NV_nvdla.v:345: ... note: In file included from NV_nvdla.v %Warning-PINMISSING: ../../outdir/nv_small/vmod/nvdla/nocif/NV_NVDLA_mcif.v:265: Cell has missing pin: 'reg2dp_rd_weight_rbk' NV_NVDLA_MCIF_csb u_csb ( ^~~~~ ../../outdir/nv_small/vmod/nvdla/top/NV_NVDLA_partition_o.v:557: ... note: In file included from NV_NVDLA_partition_o.v ../../outdir/nv_small/vmod/nvdla/top/NV_nvdla.v:345: ... note: In file included from NV_nvdla.v %Warning-PINMISSING: ../../outdir/nv_small/vmod/nvdla/nocif/NV_NVDLA_mcif.v:265: Cell has missing pin: 'reg2dp_rd_weight_sdp_e' NV_NVDLA_MCIF_csb u_csb ( ^~~~~ ../../outdir/nv_small/vmod/nvdla/top/NV_NVDLA_partition_o.v:557: ... note: In file included from NV_NVDLA_partition_o.v ../../outdir/nv_small/vmod/nvdla/top/NV_nvdla.v:345: ... note: In file included from NV_nvdla.v %Warning-PINMISSING: ../../outdir/nv_small/vmod/nvdla/nocif/NV_NVDLA_mcif.v:265: Cell has missing pin: 'reg2dp_wr_weight_bdma' NV_NVDLA_MCIF_csb u_csb ( ^~~~~ ../../outdir/nv_small/vmod/nvdla/top/NV_NVDLA_partition_o.v:557: ... note: In file included from NV_NVDLA_partition_o.v ../../outdir/nv_small/vmod/nvdla/top/NV_nvdla.v:345: ... note: In file included from NV_nvdla.v %Warning-PINMISSING: ../../outdir/nv_small/vmod/nvdla/nocif/NV_NVDLA_mcif.v:265: Cell has missing pin: 'reg2dp_wr_weight_rbk'