Hi, I am beginner to this project, and I have a basic question I noticed that there is a hw/verif/synth_tb/memory.v file available for nv_full version of nvdla. Is it like a memory module you guys attaching to the SRAM and DRAM interface of NVDLA in the top level ?. And I also noticed that nv_small doesn't have this file.?
Hi, I am beginner to this project, and I have a basic question I noticed that there is a hw/verif/synth_tb/memory.v file available for nv_full version of nvdla. Is it like a memory module you guys attaching to the SRAM and DRAM interface of NVDLA in the top level ?. And I also noticed that nv_small doesn't have this file.?