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RTL, Cmodel, and testbench for NVDLA
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how to config fused mode? #238

Closed xiaoguoer closed 5 years ago

xiaoguoer commented 5 years ago

official document (http://nvdla.org/hw/v1/hwarch.html#functional-description) says "NVDLA has two modes of operation: independent mode and fused mode". but there's no option about choosing fused mode or not in the .spec file?

ghost commented 5 years ago

I thought this was related to register programming not architecture itself. Each engine can operate independently or can be chained in single pipeline (CC -> SDP -> PDP -> CDP) - architecture should support both (for example see PDP register called FLYING_MODE)

xiaoguoer commented 5 years ago

@mmaciag thank you very much! I understand that now. But I'm a little curious about what's the function of these .rdl files in the manual directory? I used "make" command , and some backends(.v, .sv, etc) were generated (as the https://github.com/nvdla/hw/tree/nv_small/spec/manual says). However, I don't know how to use these files......

ghost commented 5 years ago

These 'backends' are used by cmod model (SystemC) and verification suite (SystemVerilog and UVM). I don't think it is used by vmod (actual RTL code). I also think about .rdl files as a supplement to the register documentation: http://nvdla.org/hw/v1/ias/programming_guide.html.

xiaoguoer commented 5 years ago

@mmaciag It becomes clear now, thank you for replying~~