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nvdla / hw

RTL, Cmodel, and testbench for NVDLA
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Synthesis hierarchical report #339

Open ndy2 opened 3 years ago

ndy2 commented 3 years ago

I want to get a synthesis report based on submodules. For example in module NV_NVDLA_partition_c, there are many submodules :

NV_NVDLA_reset NV_NVDLA_sync3d NV_NVDLA_sync3d NV_NVDLA_sync3d_s NV_NVDLA_sync3d_s NV_NVDLA_cdma NV_NVDLA_cbuf NV_NVDLA_csc NV_NVDLA_RT_csb2cmac NV_NVDLA_RT_csb2cacc NV_NVDLA_RT_cacc2glb But when I add report_area -hierarchy to the dc_run.tcl file and run synthesis. It gives a report with only one hierarchy: NV_NVDLA_partition_c

image

I try to resolve this on my own refer to leo47007's TPU-Tensor-Processing-Unit : https://github.com/leo47007/TPU-Tensor-Processing-Unit/tree/master/8x8_ctime_3.01/syn/report

But I failed. :( Help me please.