vladimiroltean
commented
6 years ago First I will start with my question regarding the sync clock algorithm. Where can I find it in order to understand how NXP achieves nanosecond precision, the calculation of the clock and the frequency.
Since the servo algorithm used is PI, the offset and frequency calculations are done here. Programs like ptp4l feed samples to the feedback loop there and apply its output (clock stepping or frequency correction) here.
could you provide a way to prove the offset value with an external means (the gap between master clock and slave clock). For example Meinberg, a NTP/PTP device provider, gives method to check the real value of the offset using the PPS (Pulse per Second) output from master and slave.
Unfortunately PPS output is not routed from the SoC onto a usable pin header on the LS1021A-TSN board. A similar board where it is, though, is the LS1021A-TWR. Normally you'd activate the output by running:
echo 1 > /sys/class/ptp/ptp0/pps_enableCan you also send me information about the phase at the Cobalt API level since this is the real-time side. I would also like to validate that we can actually synchronize a system clock "Cobalt" without going through Linux.
I'll have to ask to make sure, but as far as I know, we don't support running a 1588 stack in Xenomai at this time.
The ctrl + c stop the clock sync or it is still working ?
If you stop the slave only, the master continues to send SYNC/FOLLOW_UP packets. I also feel that I should mention that ptp4l only synchronizes the PHC devices (/dev/ptp0). To also (indirectly) synchronize the system clocks you will need to run the phc2sys program simultaneously with ptp4l.
In addition, is there a specific hardware for sending the frames with the hours and specific frames to have frequency correction ?
I don't understand this question.
In both case, I can't obtain results like in the user guide (max : 22ns & min : -23ns) and an offset stable state.
In the "switch" test case, were you sending traffic through an external switch, or through the SJA1105 connected to the internal eth2 interface? As a debugging step, could you try setting up the synchronization on the eth2 interface too and see if it makes any difference? There might be an issue with the PHY chips on eth0 and eth1 which go to sleep autonomously when they detect low amounts of traffic (like PTP only) and this may cause packet drop.
Moreover, the command : ptp4l -i eth0 -p /dev/ptp0 -f /etc/ptp4l_default.cfg –m isn't working for me, like if each LS1021 board become master without seeing the other one.
Are the boards able to ping one another?
echizenr
Hello,
I have few questions. In order to be understandable I will display results and configurations in bold.
First I will start with my question regarding the sync clock algorithm. Where can I find it in order to understand how NXP achieves nanosecond precision, the calculation of the clock and the frequency. Also regarding the performance, could you provide a way to prove the offset value with an external means (the gap between master clock and slave clock). For example Meinberg, a NTP/PTP device provider, gives method to check the real value of the offset using the PPS (Pulse per Second) output from master and slave.
In addition, is there a specific hardware for sending the frames with the hours and specific frames to have frequency correction ?
Moreover, I would like to know the method you used to perform the phase measurements on synchronized clocks. Can you also send me information about the phase at the Cobalt API level since this is the real-time side. I would also like to validate that we can actually synchronize a system clock "Cobalt" without going through Linux.
My last question before I display my configuration and results is the following one : When I use the following command : "ptp4l -i eth0 -p /dev/ptp0 -2 -m" and do a ctrl + c to stop it when I gather enough measure. The ctrl + c stop the clock sync or it is still working ? (I ask because I put a mirroring port and a wireshark to observe the traffic and even after a ctrl +c I still receive sync message from the master.
Here you can find all I did since I buid the sdcard.img and load it on each sdcard.
on master :
ifconfig eth0 hw ether 00:04:9F:EF:01:01 ptp4l -i eth0 -p /dev/ptp0 -2 -m -l 7
On slave :
ptp4l -i eth0 -p /dev/ptp0 -2 -m -l 7
vi /etc/ptp4l_default.cfg
[global] #
Default Data Set
# twoStepFlag 1 slaveOnly 0 priority1 128 priority2 128 domainNumber 0 clockClass 248 clockAccuracy 0xFE offsetScaledLogVariance 0xFFFF free_running 0 freq_est_interval 1 dscp_event 0 dscp_general 0 #
Port Data Set
# logAnnounceInterval 1 logSyncInterval -3 logMinDelayReqInterval 0 logMinPdelayReqInterval 0 announceReceiptTimeout 3 syncReceiptTimeout 0 delayAsymmetry 0 fault_reset_interval 4 neighborPropDelayThresh 20000000 #
Run time options
# assume_two_step 0 logging_level 6 path_trace_enabled 0 follow_up_info 0 hybrid_e2e 0 tx_timestamp_timeout 2 use_syslog 1 verbose 0 summary_interval -3 kernel_leap 1 check_fup_sync 0 #
Servo Options
# pi_proportional_const 0.0 pi_integral_const 0.0 pi_proportional_scale 0.0 pi_proportional_exponent -0.3 pi_proportional_norm_max 0.7 pi_integral_scale 0.0 pi_integral_exponent 0.4 pi_integral_norm_max 0.3 step_threshold 0.0 first_step_threshold 0.00002 max_frequency 900000000 clock_servo pi sanity_freq_limit 200000000 ntpshm_segment 0 #
Transport options
# transportSpecific 0x0 ptp_dst_mac 01:1B:19:00:00:00 p2p_dst_mac 01:80:C2:00:00:0E udp_ttl 1 udp6_scope 0x0E uds_address /var/run/ptp4l #
Default interface options
# network_transport UDPv4 delay_mechanism E2E time_stamping hardware tsproc_mode filter delay_filter moving_median delay_filter_length 10 egressLatency 0 ingressLatency 0 boundary_clock_jbod 0 #
Clock description
# productDescription ;; revisionData ;; manufacturerIdentity 00:00:00 userDescription ; timeSource 0xA0
You can find output files below : ptp4l_offset_direct_link.zip ptp4l_offset_switch.zip
The ptp4l_offset_direct_link.zip contain measure and graph of direct Ethernet connection test between 2 LS1021ATSN.
The ptp4l_offset_switch.zip contain measure and graph of Ethernet connection test between 2 LS1021ATSN with a switch.
In both case, I can't obtain results like in the user guide (max : 22ns & min : -23ns) and an offset stable state.
Moreover, the command : ptp4l -i eth0 -p /dev/ptp0 -f /etc/ptp4l_default.cfg –m isn't working for me, like if each LS1021 board become master without seeing the other one.
I thank you in advance for your help !