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nxp-archive / openil_linuxptp

PTP IEEE 1588 stack for Linux
GNU General Public License v2.0
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Layer 2 sync problem #4

Closed Meng0527 closed 5 years ago

Meng0527 commented 5 years ago

Hello， When I run the following command on two boards； ptp4l -i eth0 -m -2 One of the board displaying continuously the following output: ptp4l[274756.039]: selected /dev/ptp1 as PTP clock ptp4l[274756.076]: port 1: INITIALIZING to LISTENING on INIT_COMPLETE ptp4l[274756.076]: port 0: INITIALIZING to LISTENING on INIT_COMPLETE ptp4l[274762.975]: port 1: LISTENING to MASTER on ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES ptp4l[274762.976]: selected local clock 6805ca.fffe.21d777 as best master ptp4l[274762.977]: assuming the grand master role ptp4l[274810.082]: port 1: bad message ptp4l[274811.082]: port 1: bad message ptp4l[274812.082]: port 1: bad message ptp4l[274813.082]: port 1: bad message ptp4l[274814.083]: port 1: bad message ptp4l[274815.083]: port 1: bad message The same problem occurs when I use two servers connected by sja1105 or one server and one board for Layer 2 time synchronization. L3 sync works well. Could you please help me with this problem ? I also have a question with PTPSCHTIME parameter，in UM10944,Table 60. PTP control registers 2 to 6,it says this parameter specifies the time on the synchronized PTP clock at whichthe switch integrates into the schedule.But this parameter is not readable or writable. How is it generated and works? Thanks！

Meng0527 commented 5 years ago

Thid is the frame I captured when I use one server and one board for Layer 2 time synchronization.

error frame.zip

vladimiroltean commented 5 years ago

Hello Meng, Thank you for your report. I think we have seen this before in a different environment. The OpenIL kernel uses this patch backported from 4.17.0-rc4: packet: in packet_snd start writing at link layer allocation. It looks like this patch is introducing a regression: the network stack is increasing skb->len past the actual frame size. The upstream fixup came in 4.17.0-rc6: packet: fix reserve calculation. I don't see the fixup commit backported in the OpenIL kernel. Could you please cherry-pick it and see if it fixes your issue?

vladimiroltean commented 5 years ago

I also have a question with PTPSCHTIME parameter，in UM10944,Table 60. PTP control registers 2 to 6,it says this parameter specifies the time on the synchronized PTP clock at whichthe switch integrates into the schedule.But this parameter is not readable or writable. How is it generated and works?

What do you mean PTPSCHTIME is not readable nor writable? It is not accessible in the sja1105-tool (since it's useless to set it statically), but accessible at runtime through the libsja1105. Please also check out this response for more details about how the time-aware scheduler works.

Meng0527 commented 5 years ago

Thank you! It successfully fixed my problem!And now I have a general understanding of how synchronized Qbv works.But how do I use the libsja1105? I checked all the documents I have but didn't find it.

vladimiroltean commented 5 years ago

What do you want to do with the libsja1105? There is no explicit document for its API, but maybe you can open a new ticket clarifying your use case and we can discuss the best approach for it.

Meng0527 commented 5 years ago

I want to read and set some parameters in Chapter 5.2 of UM10944, but it seems that sja1105-tool does not support it. Can I do this using libsja1105-tool?

vladimiroltean commented 5 years ago

It is in fact possible to perform raw SPI access using the sja1105-tool.

# Read the RAM parity check configuration register 2 (address 0Dh) - operation retrieves 4 bytes at the given address
sja1105-tool reg 0x0D
# Read the 64-bit PTPCLKVAL
sja1105-tool reg dump 0x18 8
Meng0527 commented 5 years ago

Thank you, I think my problem has been solved.