Closed Hadatko closed 1 year ago
Adding @Lucien-Zhao to help check the issue, but the feedback could be delayed because it's weekend, appreciate for your patience.
Hi @Hadatko , Which version of JLINK software you use? Could I take your problem to mean that you can't debug cm4 project using SDRAM on RT1170?
Hi @Lucien-Zhao , my version is 7.50a. It is not even running. Default single/multicore examples which are not using SDRAM target are running and also i am able to debug. But SDRAM target devices i cannot.
Could you try to use JLINK commander below before running the demos. monitor reg sp = (0x) (Please input the sp address in your image) monitor reg pc = (0x) (Please input the pc address in your image)
Hi @Lucien-Zhao , sorry i didn't have much time to try anything. Here are some outputs from my debugger:
Please check OUTPUT tab (Adapter Output) for output from JLinkGDBServer Launching server: "JLinkGDBServer" "-if" "swd" "-port" "50000" "-swoport" "50001" "-telnetport" "50002" "-device" "MIMXRT1176xxxA_M4" "-jlinkscriptfile" "evkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript" Launching GDB: "Tools/gcc-arm-none-eabi/bin/arm-none-eabi-gdb" "-q" "--interpreter=mi2" Reading symbols from app.elf... 0x30002552 in ?? () Not implemented stop reason (assuming exception): undefined 2 Resetting target
` SEGGER J-Link GDB Server V7.50a Command Line Version JLinkARM.dll V7.50a (DLL compiled Jul 8 2021 18:20:53)
Command line: -if swd -port 50000 -swoport 50001 -telnetport 50002 -device MIMXRT1176xxxA_M4 -jlinkscriptfile evkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 50000
SWO raw output listening port: 50001
Terminal I/O port: 50002
Accept remote connection: yes
Generate logfile: off
Verify download: off
Init regs on start: off
Silent mode: off
Single run mode: off
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: evkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript
J-Link settings file: none
------Target related settings------
Target device: MIMXRT1176xxxA_M4
Target interface: SWD
Target interface speed: 4000kHz
Target endian: little
Connecting to J-Link...
J-Link is connected.
Firmware: J-Link Ultra V4 compiled Jun 29 2021 16:13:04
Hardware: V4.00
S/N: 504400580
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
Checking target voltage...
Target voltage: 3.29 V
Listening on TCP/IP port 50000
Connecting to target...
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x0023F040 (Data = 0x0000E7FE)
Read 2 bytes @ address 0x0023F040 (Data = 0xE7FE)
Received monitor command: halt
Halting target CPU...
...Target halted (PC = 0x0023F040)
Received monitor command: reset
Resetting target
Downloading 1024 bytes @ address 0x08002000
Downloading 16016 bytes @ address 0x08002400
Downloading 16096 bytes @ address 0x08006290
Downloading 16000 bytes @ address 0x0800A170
Downloading 16096 bytes @ address 0x0800DFF0
Downloading 16144 bytes @ address 0x08011ED0
Downloading 16144 bytes @ address 0x08015DE0
Downloading 16128 bytes @ address 0x08019CF0
Downloading 16176 bytes @ address 0x0801DBF0
Downloading 16128 bytes @ address 0x08021B20
Downloading 16192 bytes @ address 0x08025A20
Downloading 16096 bytes @ address 0x08029960
Downloading 16176 bytes @ address 0x0802D840
Downloading 16192 bytes @ address 0x08031770
Downloading 16208 bytes @ address 0x080356B0
Downloading 16192 bytes @ address 0x08039600
Downloading 16288 bytes @ address 0x0803D540
Downloading 428 bytes @ address 0x080414E0
Downloading 8 bytes @ address 0x0804168C
Downloading 4 bytes @ address 0x08041694
Downloading 4 bytes @ address 0x08041698
Downloading 356 bytes @ address 0x0804169C
Writing register (PC = 0x 80024bc)
Received monitor command: reset
Resetting target
Read 4 bytes @ address 0x080024BC (Data = 0x4816B672)
Read 2 bytes @ address 0x080024BC (Data = 0xB672)
Reading 64 bytes @ address 0x080039C0
Read 2 bytes @ address 0x080039DA (Data = 0xF000)
Setting breakpoint @ address 0x080039DA, Size = 2, BPHandle = 0x0001
Starting target CPU...
`
When i pause program i see:
Nothing showed on display.
Path to example: SDK_2_10_0_MIMXRT1170-EVK/boards/evkmimxrt1170/littlevgl_examples/littlevgl_guider/cm4/armgcc/
With JLink command i have no experience. I got this error message:
Hi @Hadatko,
I have checked the release note for RT1170. Now there are still some issues on armgcc when debugging RT1170 with JLINK. We are discussing with SEGGER about this issues. I think this issue will be resolved recently. We have marked this on page 2 of RT1170 release note, you can see picture below:
Back to your question, please install the NXP internal patch to retry according to process in readme.
Hi @Lucien-Zhao, thank you for your post. I read this information but i forget about it as it is not very descriptive (what is not working...) And also there is mentioned version 7.00. If there would be 7.xx it may means all v7 versions (as i am using 7.50a not 7.00).
Later next week my colleague will try your patch and we will let you know about progress. Thank you very much.
Hi @Hadatko, does the patch work for you? Could we close the issue for now?
HI @mcuxsusan, currently we changed a bit priorities and possible solution in our current project. I am not sure if we will try this patch or not now. COuld we keep it open to the end of this month and i think i can update you in next two weeks.
@Hadatko, sure, appreciate for such quick reply.
I will close this issue for now. Not sure what is its current state. Likely we workrounded that somehow...
Hi, i am able to run m4 examples with using script
evkmimxrt1170_connect_cm4_cm4side.jlinkscript
and swd. I am not able to run m4 examples with scriptevkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript
. Main issue is that i am not able to run m4 side in dual core with using any jlinkscript file. Use case: I want merge multicre mu example with lvgl example. I want let lvgl part on m4 side. MU without lvgl is working well (as there is non sdram target for m4 core). When m4 core is filled with lvgl files the memory target has to be changed to use SDRAM memory. As i am not able to run m4 core with sdram target in single mode, i am also not able to achieve that in multicore mode.