This patch allows users to modify how quickly sensors are polled.
One of the major features of Zen+ and newer processors is the ability
for them to perform gated sleeping on one or multiple cores at a time,
where power consumption of the gated core is "basically zero".
Since, by default, the application uses a polling rate of 300ms, the
power saving features of cores sleeping on Zen+ and newer is negated
when a sensor or MSR is probed often.
Allowing the users to modify the polling rate from between 50ms and
up to 60 seconds improves power saving by preventing cores from being
awoken multiple times a second when it isn't needed.
We have determined that many popular monitoring tools are quite aggressive in how they monitor the behavior of a core. Some of them wake every core in the system for 20ms, and do this as often as every 200ms. From the perspective of the processor firmware, this is interpreted as a workload that's asking for sustained performance from the core(s). The firmware is designed to respond to such a pattern by boosting: higher clocks, higher voltages.
The Effect of This Pattern
So, if you're sitting there staring at your monitoring tool, the tool is constantly instructing all the cores to wake up and boost. This will keep the clockspeeds high, and the corresponding voltages will be elevated to support that boost. This is a classic case of observer effect: you're expecting the tool to give valid data, but it's actually producing invalid data by virtue of how it's measuring.
This patch allows users to modify how quickly sensors are polled.
One of the major features of Zen+ and newer processors is the ability for them to perform gated sleeping on one or multiple cores at a time, where power consumption of the gated core is "basically zero".
Since, by default, the application uses a polling rate of 300ms, the power saving features of cores sleeping on Zen+ and newer is negated when a sensor or MSR is probed often.
Allowing the users to modify the polling rate from between 50ms and up to 60 seconds improves power saving by preventing cores from being awoken multiple times a second when it isn't needed.
Sources: https://old.reddit.com/r/Amd/comments/cbls9g/the_final_word_on_idle_voltages_for_3rd_gen_ryzen/