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oddball / ipxact2systemverilog

Translates IPXACT XML to synthesizable VHDL or SystemVerilog
GNU General Public License v2.0
56 stars 19 forks source link

Validation Failed - user left in the dark ... :) #13

Closed galaviel closed 6 years ago

galaviel commented 6 years ago

Hi There,

Just started using this project.. nice work!

When validation failed there is no specific error printed to the user. I've worked with XML files allot but never with a schema.. I didn't know what was wrong with my file.

Suggest to add this snippet so the user is not left in the dark and can fix whatever is wrong (to validate.py):

if not result:
    print(schema.error_log)

I've never used github .. can I just commit this change?

any help / opinion is welcome !!

thanks, Gal.

oddball commented 6 years ago

Hi Gal! Sorry to answer so late, need to review my email settings. Didn't see this until today.

ipxact2systemverilog assumes that the input xml is validated already. For example you can validate it with something like this

xmllint --noout --schema ipxact2systemverilog/xml/component.xsd  example/input/test.xml

That will give you an error with a description and a line number of the error.

Regarding contributions, if you fork the repo and commit changes, you can make a pull request back to the original repo and I will review the request.

I like your idea, it makes sense

Best regards

oddball commented 6 years ago

Updated according to suggestion, and released 1.0.3