For my project I need to use the sulv<->record functions outside of the generated package.
Made this a configuration. To stay compatible I needed to pass the configuration to the generator functions. If this "VhdlPublicConvFunct" configuration is made it will print the function declarations in the VHDL package.
I would like these conversion functions so the register description can be used by the VHDL testbench. It would be nice to have this feature or some feedback on how this feature could be added.
For my project I need to use the sulv<->record functions outside of the generated package. Made this a configuration. To stay compatible I needed to pass the configuration to the generator functions. If this "VhdlPublicConvFunct" configuration is made it will print the function declarations in the VHDL package.