olofk / serv

SERV - The SErial RISC-V CPU
ISC License
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Interrupts not properly masked in Zephyr #113

Closed olofk closed 1 month ago

olofk commented 9 months ago

The Zephyr Dining Philosophers demo crashes when asserts are enabled. Need to investigate if interrupts are handled correctly on the sw and hw sides. Could be an issue that the mpie bit is not readable and writable from software

fusesoc run --target=verilator_tb servant --uart_baudrate=55600 --memsize=65536 --firmware zephyr35_phil.hex 
INFO: Preparing ::serv:1.2.1
INFO: Preparing ::servant:1.2.1
make: Nothing to be done for 'all'.
Loading RAM from /home/olof/projects/serv/workspace/zephyr35_phil.hex
*** Booting Zephyr OS build zephyr-v3.5.0 ***
Demo Description
----------------
An implementation of a solution to the Dining Philosophers
problem (a classic multi-thread synchronization problem).
This particular implementation demonstrates the usage of multiple
preemptible and cooperative threads of differing priorities, as
well as dynamic mutexes and thread sleeping.

Philosopher 0 [C:-2]   EATING  [  02 ms ]  
ASSERTION FAIL [arch_irq_unlocked(key) || _kernel.cpus[0].current->base.thread_state & (((1UL << (0))) | ((1UL << (3))))] @ WEST_TOPDIR/zephyr/kernel/include/kswap.h:02
    Context switching while holding lock!
^C
Caught ctrl-c

INFO: ****************************
INFO: ****   FuseSoC aborted  ****