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oneapi-src / oneDNN

oneAPI Deep Neural Network Library (oneDNN)
https://uxlfoundation.org
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SSE41 kernels are broken #1959

Open nwnk opened 3 weeks ago

nwnk commented 3 weeks ago

I'm trying to build oneDNN CPU-only (OMP backed) and with only the minimal SSE41 kernels, on Fedora 40. The result does not pass ctest:

92% tests passed, 13 tests failed out of 154

Total Test time (real) = 7228.97 sec

The following tests FAILED:
         18 - test_iface_attr (Failed)
         19 - test_iface_attr_quantization (Failed)
         42 - test_rnn_forward (Failed)
         44 - test_softmax (Failed)
         51 - test_gemm_f32 (Failed)
         54 - test_gemm_u8s8s32 (Failed)
         77 - test_graph_c_api_compile_usm_cpu (Failed)
        108 - test_graph_unit_dnnl_conv_usm_cpu (Failed)
        113 - test_graph_unit_dnnl_large_partition_usm_cpu (Failed)
        116 - test_graph_unit_dnnl_mqa_decomp_usm_cpu (Failed)
        122 - test_graph_unit_dnnl_sdp_decomp_usm_cpu (Failed)
        123 - test_graph_unit_dnnl_softmax_usm_cpu (Failed)
        151 - test_benchdnn_modeC_softmax_ci_cpu (Failed)

Specifically this is with both DNNL_ENABLE_PRIMITIVE_CPU_ISA and ONEDNN_ENABLE_GEMM_KERNELS_ISA set to SSE41. If I set them both to AVX2 all tests pass. I have not tested AVX512 or AMX yet. I will try setting just one to AVX2 (both ways) and see if that helps narrow it down.

Relevant environment and version info:

% rpm -q gcc
gcc-14.0.1-0.15.fc40.x86_64
% git log -1 --format=%H
3c0e1f1635c81ae9074f2deeff9977a2a8ef149d
% grep -m1 ^model.name /proc/cpuinfo
model name  : Intel(R) Core(TM) i9-10900 CPU @ 2.80GHz
% grep -m1 ^flags /proc/cpuinfo
flags       : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp vnmi pku ospke md_clear flush_l1d arch_capabilities
nwnk commented 3 weeks ago

With DNNL_ENABLE_PRIMITIVE_CPU_ISA=SSE41 and ONEDNN_ENABLE_GEMM_KERNELS_ISA=AVX2:

94% tests passed, 9 tests failed out of 154

Total Test time (real) = 715.86 sec

The following tests FAILED:
         18 - test_iface_attr (Failed)
         44 - test_softmax (Failed)
         77 - test_graph_c_api_compile_usm_cpu (Failed)
        108 - test_graph_unit_dnnl_conv_usm_cpu (Failed)
        113 - test_graph_unit_dnnl_large_partition_usm_cpu (Failed)
        116 - test_graph_unit_dnnl_mqa_decomp_usm_cpu (Failed)
        122 - test_graph_unit_dnnl_sdp_decomp_usm_cpu (Failed)
        123 - test_graph_unit_dnnl_softmax_usm_cpu (Failed)
        151 - test_benchdnn_modeC_softmax_ci_cpu (Failed)

With DNNL_ENABLE_PRIMITIVE_CPU_ISA=AVX2 and ONEDNN_ENABLE_GEMM_KERNELS_ISA=SSE41:

97% tests passed, 4 tests failed out of 154

Total Test time (real) = 868.35 sec

The following tests FAILED:
         19 - test_iface_attr_quantization (Failed)
         42 - test_rnn_forward (Failed)
         51 - test_gemm_f32 (Failed)
         54 - test_gemm_u8s8s32 (Failed)
shu1chen commented 3 weeks ago

@nwnk Thank you for reporting the issue. I can reproduce most of the test failures locally. After adding ONEDNN_VERBOSE=all in the environment, the detailed log shows that some problem cases are not supported by SSE41 ISA, e.g. with command line ONEDNN_VERBOSE=all ctest -R test_rnn_forward --rerun-failed --output-on-failure for test_rnn_forward, it shows in Testing/Temporary/LastTest.log that all the dispatches are skipped and no implementation is available for this test case: 

[ RUN      ] TestGRU_CPU/gru_forward_test_f32.TestsGRU/0
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,brgemm:,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:347
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,brgemm:,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:83
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,ref,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:347
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,ref,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:83
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,brgemm:undef,forward_inference,src_layer_f32:a:blocked:abc::f0 src_iter_f32:a:blocked:abcd::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:blocked:abcd::f0 dst_layer_f32:a:blocked:abc::f0 dst_iter_f32:a:blocked:abcd::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported feature for implementation: gru/augru cell in brgemm-based forward inference,src/cpu/rnn/ref_rnn.cpp:375
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,brgemm:undef,forward_inference,src_layer_f32:a:blocked:abc::f0 src_iter_f32:a:blocked:abcd::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:blocked:abcd::f0 dst_layer_f32:a:blocked:abc::f0 dst_iter_f32:a:blocked:abcd::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,failed to create nested primitive rnn,src/cpu/rnn/ref_rnn.cpp:92
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,ref,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:347
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,ref,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:83
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,ref,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:347
onednn_verbose,primitive,create:dispatch,rnn,cpu,rnn,ref,forward_inference,src_layer_f32:a:any:any::f0 src_iter_f32:a:any:any::f0 wei_layer_f32:a:any:any::f0 wei_iter_f32:a:any:any::f0 bias_f32:a:any:any::f0 dst_layer_f32:a:any:any::f0 dst_iter_f32:a:any:any::f0,,alg:vanilla_gru direction:unidirectional_left2right activation:undef flags:,l1t1mb1sic5slc10dhc5dic5,unsupported datatype,src/cpu/rnn/ref_rnn.cpp:83
unknown file: Failure
C++ exception with description "could not create a primitive descriptor for a GRU forward propagation primitive" thrown in SetUp().

I will report this issue internally to have better coordination of all the test cases for the ISAs.

vpirogov commented 2 weeks ago

@nwnk, thank you for the report. Looks like we have an issue with tests and/or dispatcher when DNNL_ENABLE_PRIMITIVE_CPU_ISA option is enabled.

The library is functional on platforms with Intel SSE 4.1 instruction set support. This can be validated either by running tests on system with Intel SSE4.1, running tests with environment variable ONEDNN_MAX_CPU_ISA=SSE41, or using tools like Intel SDE.

Setting the bug aside, could you please elaborate on what you are using DNNL_ENABLE_PRIMITIVE_CPU_ISA option for?

nwnk commented 2 weeks ago

Setting the bug aside, could you please elaborate on what you are using DNNL_ENABLE_PRIMITIVE_CPU_ISA option for?

Experimentation, mostly. Trying to get a feel for how much larger each ISA makes the resulting binary, and validating that the library works as documented on the minimal feature set that it claims to support.

vpirogov commented 2 weeks ago

Thanks for the details. We're looking into options to address the test issue.