Exclude sycl::half testing on FPGA devices in sort.pass

oneapi-src / oneDPL

oneAPI DPC++ Library (oneDPL) https://software.intel.com/content/www/us/en/develop/tools/oneapi/components/dpc-library.html

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Exclude sycl::half testing on FPGA devices in sort.pass #1606

Closed mmichel11 closed 2 months ago

mmichel11 commented 2 months ago

sort.pass currently fails on FPGA_EMU devices with the following error message:

 what():  Required aspect fp16 is not supported on the device

This PR removes sycl::half testing with FPGA devices to resolve this issue.

danhoeflinger commented 2 months ago

Can we add a comment in the code describing why we are skipping this case?

mmichel11 commented 2 months ago

I have closed this pull request. The root of the issue is that FPGA_EMU is using AOT compilation which currently avoids our checks for device aspect support for fp16 with the icpx compiler. @dmitriy-sobolev and I have discussed and the proper solution is to add -fsycl-device-code-split=per_kernel to FPGA compilation targets similarly to what we do for GPUs.