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open-ephys / next-gen-system

work in progress repository for next generation acquisition and closed-loop feedback system
https://open-ephys.atlassian.net/wiki/display/OEW/PCIe+acquisition+board
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What protection to add to the PCIe breakout DIO board #7

Open jvoigts opened 8 years ago

jvoigts commented 8 years ago

The pcie breakout/DIO board needs to expose a lot of almost bare FPGA pins. Even tough these pins are somewhat protected by the VHDCI connector design, we should add the maximum level of input protection that ensures that we dont degrade the performance of the lines. This means that galvanic isolation is out, but protection diodes might work.

jvoigts commented 8 years ago

There seem to be decent TVS diode packages fro LVDS lines - thes ones have ~2pF max. http://www.onsemi.com/pub_link/Collateral/ESDR7534-D.PDF

This one looks similar, at 3pF: http://www.semtech.com/images/datasheet/srv05-4.pdf

These ones look pretty decent too - littlefuse has a pretty wide range of these, the 3011 for instance covers 3 pairs per chip, the 3010 does 2. These claim <0.5pF: http://www.littelfuse.com/~/media/electronics/datasheets/tvs_diode_arrays/littelfuse_tvs_diode_array_sp3011_datasheet.pdf.pdf

What level of signal degradation can we accept? Also, we should think about the board space a bit - we have 4*21 LVDS lines to deal with.

jonnew commented 8 years ago
jonnew commented 8 years ago

Here are a bunch of offerings for LVDS:

http://www.ti.com/lsds/ti/interface/esd-emi-protection-products.page#p158=LVDS

jvoigts commented 8 years ago

ah yea, that looks great - the TPD8S009 looks good for instance

aacuevas commented 8 years ago

Yeah, ESD diodes for high speed differential lines are pretty much common nowadays, we just need a couple of multi-channel chips and we're set.

jvoigts commented 8 years ago

sounds good - should we go ahead woth this one for the schematic for now? Looks like the lowest capacitance one of the bunch, and comes in 6 channel packages. http://www.ti.com/lit/ds/symlink/tpd6e05u06.pdf

jonnew commented 8 years ago

Any of these are fine. Go with the one that is good for lvds and most amenable to routing at reasonable pcb tolerances: 5mil trace space. 12 miles holes. At anything less than 1 pf, parasitic capacitance will be totally dominated by our layout, trust me.

jvoigts commented 8 years ago

Cool, i'll start putting something together later today if i get some downtime. So I take it you have seen my board layouts before..