The MSI and Suzho, we came across a common problem where the common settings used to fail calibration at istep as the RCD word was not getting set properly.
The root cause was fixed and this issue is to keep track to merge the Fix.
The issue was with the way we were sending out the RCD control words in draminit. As mentioned, this code path had never been run through (ddr4 2R dual drop) .. in DDR4 CS0 needs to be pulled low on each dimm meaning CS0 for dimm 0 and CS4 for dimm 1. The code in dev and HB has CS0 being pulled twice. After playing with parity error injects it became obvious something was fishy about rank 4 being impervious to fails. Given that, current fix
code is in /opt/openpower/memtools/lwm_draminit_override
The MSI and Suzho, we came across a common problem where the common settings used to fail calibration at istep as the RCD word was not getting set properly.
The root cause was fixed and this issue is to keep track to merge the Fix.
The issue was with the way we were sending out the RCD control words in draminit. As mentioned, this code path had never been run through (ddr4 2R dual drop) .. in DDR4 CS0 needs to be pulled low on each dimm meaning CS0 for dimm 0 and CS4 for dimm 1. The code in dev and HB has CS0 being pulled twice. After playing with parity error injects it became obvious something was fishy about rank 4 being impervious to fails. Given that, current fix code is in /opt/openpower/memtools/lwm_draminit_override
The mss_ddr4_funcs.C is to be updated.