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open-power / hostboot

System initialization firmware for Power systems
Apache License 2.0
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Is the DDR MR setting done by OCMB? #208

Closed Grubby0624 closed 2 years ago

Grubby0624 commented 2 years ago

Excuse me: The function in the following file src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C: read_and_display_normal_training_response，Does it mean that MRS commands are sent to DRAM by OCMB?

dcrowell77 commented 2 years ago

Yes, the OCMB is in charge of all of the DDR communication out to the DRAMs.

@esteban012 @stermole

sglancy6 commented 2 years ago

@Grubby0624 Dan is correct. The OCMB will send the MRS commands to the DRAM. This is handled in draminit in two sections:

  1. The initialization is handled by the OCMB's on chip firmware. The binary package for Explorer is located here https://github.com/open-power/ocmb-explorer-fw
  2. After training, some MRS settings are changed via the Configure Command Sequence (CCS).

Hope this helps!

Grubby0624 commented 2 years ago

ok, got it, thanks