dcrowell77
commented
1 year ago In general you can't arbitrarily decide where memory is mapped. There are a lot of rules involved, the path starts in https://github.com/open-power/hostboot/blob/master-p10/src/import/chips/p10/procedures/hwp/nest/p10_mss_eff_grouping.C for how memory is assigned behind each processor. The one immutable rule is that the mainstore/memory address range must be part of the overall address range defined by that processor's fabric/topology id. See https://github.com/open-power/hostboot/blob/master-p10/src/include/arch/memorymap.H for a basic description of the address layout. In general the logic topology id will match the physical position, but there are scenarios where the addresses are swapped around, e.g. if there is no valid memory behind processor 0 we will steal the address range of another processor to ensure that we have the 0th block allocated somewhere.
https://github.com/open-power/hostboot/blob/b4bf5ad74828722b1e0aa4eb06b2b3b4748b3c58/src/import/chips/p10/procedures/hwp/nest/p10_exit_cache_contained.C#L316 How does the CPU determine which DIMM's storage unit it is accessing when accessing a physical address? For example, if the physical address 0x00008000000000 accesses the Rank0/Bank0 of DIMM0 in Proc2, and I now want to point it to the Rank0/Back0 of DIMM0 in Proc1, can this be achieved? Can you help me point out the code location for determining this correspondence? Thank you!