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open-power / hostboot

System initialization firmware for Power systems
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Is there a register on P10 that can directly adjust "write delay values for one of the MEMINTDnnB pins" #239

Closed Grubby0624 closed 6 months ago

Grubby0624 commented 9 months ago

I remember there is a register on P9 that directly adjusts the "write delay values for one of the MEMINTDnnB pins". Is there a similar register on P10 that can directly affect the shemoo test results

dcrowell77 commented 9 months ago

I'm not familiar with MEMINTDnnB. Can you point me to some code that references it or tell me the specific scom address from P9?

Grubby0624 commented 9 months ago

Here are some combinations of registers whose addresses can be found in this file: src\import\chips\p9\common\include\p9_mc_scom_addresses.H I am interested in the following two sets of registers: WR_DQ_DELAY_REG: https://github.com/open-power/hostboot/blob/74d0f6e3ff0bec6488715c37e12f1462239548c6/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C#L1078 READ_DELAY_REG: https://github.com/open-power/hostboot/blob/74d0f6e3ff0bec6488715c37e12f1462239548c6/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C#L636