Closed RameshIyyar closed 3 years ago
For nx and tpm, you need to add the right addresses since they are chiplet level. Need to provide translate function , eg : .translate = p10_core_translate. There is already hwp for translation in ekb , you can refer.
For nx and tpm, you need to add the right addresses since they are chiplet level.
Ok, I will push a separate PR for NX and TPM - Updated this PR to just have DIMM and MEM_PORT, please take a look.
LGTM
Merged with changes as discussed separately.
For nx and tpm, you need to add the right addresses since they are chiplet level.