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open-sdr / openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
GNU Affero General Public License v3.0
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Build FPGA #293

Closed Fei8686 closed 1 year ago

Fei8686 commented 1 year ago

Hi, Thank you for updating the new version of openwifi-v1.4.0. Recently, I encountered some problems while build FPGA of openwifi-v1.4.0.I am experimenting with Ubuntu 2018.The version of VIVADO I use is 2021.1.

When I build fpga based on the relevant instructions in README.md, the following error will be reported in Vivado：

source ./openwifi.tcl
# set NUM_CLK_PER_US 100
# set  fd  [open  "./ip_repo/clock_speed.v"  w]
# puts $fd "`define NUM_CLK_PER_US $NUM_CLK_PER_US"
# close $fd
# exec cp ./ip_repo/clock_speed.v ./ip_repo/tx_intf/src/ -f
# exec cp ./ip_repo/clock_speed.v ./ip_repo/rx_intf/src/ -f
# exec cp ./ip_repo/clock_speed.v ./ip_repo/xpu/src/ -f
# set  fd  [open  "./ip_repo/xpu/src/openwifi_hw_git_rev.v"  w]
# set HASHCODE [exec ../../get_git_rev.sh]
# puts $fd "`define OPENWIFI_HW_GIT_REV (32'h$HASHCODE)"
# close $fd
# set origin_dir "."
# if { [info exists ::origin_dir_loc] } {
#   set origin_dir $::origin_dir_loc
# }
# set _xil_proj_name_ "openwifi_zc706_fmcs2"
# exec rm -rf $_xil_proj_name_
# exec git clean -dxf ./src/
# if { [info exists ::user_project_name] } {
#   set _xil_proj_name_ $::user_project_name
# }
# variable script_file
# set script_file "openwifi.tcl"
# proc print_help {} {
#   variable script_file
#   puts "\nDescription:"
#   puts "Recreate a Vivado project from this script. The created project will be"
#   puts "functionally equivalent to the original project for which this script was"
#   puts "generated. The script contains commands for creating a project, filesets,"
#   puts "runs, adding/importing sources and setting properties on various objects.\n"
#   puts "Syntax:"
#   puts "$script_file"
#   puts "$script_file -tclargs \[--origin_dir <path>\]"
#   puts "$script_file -tclargs \[--project_name <name>\]"
#   puts "$script_file -tclargs \[--help\]\n"
#   puts "Usage:"
#   puts "Name                   Description"
#   puts "-------------------------------------------------------------------------"
#   puts "\[--origin_dir <path>\]  Determine source file paths wrt this path. Default"
#   puts "                       origin_dir path value is \".\", otherwise, the value"
#   puts "                       that was set with the \"-paths_relative_to\" switch"
#   puts "                       when this script was generated.\n"
#   puts "\[--project_name <name>\] Create project with the specified name. Default"
#   puts "                       name is the name of the project from where this"
#   puts "                       script was generated.\n"
#   puts "\[--help\]               Print help information for this script"
#   puts "-------------------------------------------------------------------------\n"
#   exit 0
# }
# if { $::argc > 0 } {
#   for {set i 0} {$i < $::argc} {incr i} {
#     set option [string trim [lindex $::argv $i]]
#     switch -regexp -- $option {
#       "--origin_dir"   { incr i; set origin_dir [lindex $::argv $i] }
#       "--project_name" { incr i; set _xil_proj_name_ [lindex $::argv $i] }
#       "--help"         { print_help }
#       default {
#         if { [regexp {^-} $option] } {
#           puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n"
#           return 1
#         }
#       }
#     }
#   }
# }
# set orig_proj_dir "[file normalize "$origin_dir/"]"
# create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7z045ffg900-2
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/share/VIVADO/Vivado/2021.1/data/ip'.
# set proj_dir [get_property directory [current_project]]
# set obj [current_project]
# set_property -name "board_part" -value "" -objects $obj
# set_property -name "classic_soc_boot" -value "0" -objects $obj
# set_property -name "compxlib.activehdl_compiled_library_dir" -value "$proj_dir/${_xil_proj_name_}.cache/compile_simlib/activehdl" -objects $obj
# set_property -name "compxlib.funcsim" -value "1" -objects $obj
# set_property -name "compxlib.ies_compiled_library_dir" -value "$proj_dir/${_xil_proj_name_}.cache/compile_simlib/ies" -objects $obj
# set_property -name "compxlib.modelsim_compiled_library_dir" -value "$proj_dir/${_xil_proj_name_}.cache/compile_simlib/modelsim" -objects $obj
# set_property -name "compxlib.overwrite_libs" -value "0" -objects $obj
# set_property -name "compxlib.questa_compiled_library_dir" -value "$proj_dir/${_xil_proj_name_}.cache/compile_simlib/questa" -objects $obj
# set_property -name "compxlib.riviera_compiled_library_dir" -value "$proj_dir/${_xil_proj_name_}.cache/compile_simlib/riviera" -objects $obj
# set_property -name "compxlib.timesim" -value "1" -objects $obj
# set_property -name "compxlib.vcs_compiled_library_dir" -value "$proj_dir/${_xil_proj_name_}.cache/compile_simlib/vcs" -objects $obj
# set_property -name "compxlib.xsim_compiled_library_dir" -value "" -objects $obj
# set_property -name "corecontainer.enable" -value "0" -objects $obj
# set_property -name "default_lib" -value "xil_defaultlib" -objects $obj
# set_property -name "enable_optional_runs_sta" -value "0" -objects $obj
# set_property -name "enable_vhdl_2008" -value "1" -objects $obj
# set_property -name "generate_ip_upgrade_log" -value "1" -objects $obj
# set_property -name "ip_cache_permissions" -value "read write" -objects $obj
# set_property -name "ip_interface_inference_priority" -value "" -objects $obj
# set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj
# set_property -name "legacy_ip_repo_paths" -value "" -objects $obj
# set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj
# set_property -name "part" -value "xc7z045ffg900-2" -objects $obj
# set_property -name "platform.board_id" -value "zc706" -objects $obj
# set_property -name "platform.default_output_type" -value "undefined" -objects $obj
# set_property -name "platform.design_intent.datacenter" -value "undefined" -objects $obj
# set_property -name "platform.design_intent.embedded" -value "undefined" -objects $obj
# set_property -name "platform.design_intent.external_host" -value "undefined" -objects $obj
# set_property -name "platform.design_intent.server_managed" -value "undefined" -objects $obj
# set_property -name "platform.rom.debug_type" -value "0" -objects $obj
# set_property -name "platform.rom.prom_type" -value "0" -objects $obj
# set_property -name "platform.slrconstraintmode" -value "0" -objects $obj
# set_property -name "preferred_sim_model" -value "rtl" -objects $obj
# set_property -name "project_type" -value "Default" -objects $obj
# set_property -name "pr_flow" -value "0" -objects $obj
# set_property -name "revised_directory_structure" -value "1" -objects $obj
# set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj
# set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj
# set_property -name "sim.use_ip_compiled_libs" -value "1" -objects $obj
# set_property -name "simulator.activehdl_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.activehdl_install_dir" -value "" -objects $obj
# set_property -name "simulator.ies_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.ies_install_dir" -value "" -objects $obj
# set_property -name "simulator.modelsim_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.modelsim_install_dir" -value "" -objects $obj
# set_property -name "simulator.questa_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.questa_install_dir" -value "" -objects $obj
# set_property -name "simulator.riviera_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.riviera_install_dir" -value "" -objects $obj
# set_property -name "simulator.vcs_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.vcs_install_dir" -value "" -objects $obj
# set_property -name "simulator.xcelium_gcc_install_dir" -value "" -objects $obj
# set_property -name "simulator.xcelium_install_dir" -value "" -objects $obj
# set_property -name "simulator_language" -value "Mixed" -objects $obj
# set_property -name "source_mgmt_mode" -value "All" -objects $obj
# set_property -name "target_language" -value "Verilog" -objects $obj
# set_property -name "target_simulator" -value "XSim" -objects $obj
# set_property -name "tool_flow" -value "Vivado" -objects $obj
# set_property -name "xpm_libraries" -value "XPM_CDC XPM_FIFO XPM_MEMORY" -objects $obj
# set_property -name "xsim.array_display_limit" -value "1024" -objects $obj
# set_property -name "xsim.radix" -value "hex" -objects $obj
# set_property -name "xsim.time_unit" -value "ns" -objects $obj
# set_property -name "xsim.trace_limit" -value "65536" -objects $obj
# if {[string equal [get_filesets -quiet sources_1] ""]} {
#   create_fileset -srcset sources_1
# }
# set obj [get_filesets sources_1]
# set_property "ip_repo_paths" "[file normalize "$origin_dir/../../adi-hdl/library"] [file normalize "$origin_dir/ip_repo/"]" $obj
# update_ip_catalog -rebuild
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/share/project/openwifi-v1.4.0/openwifi/openwifi-hw/adi-hdl/library'.
INFO: [IP_Flow 19-1700] Loaded user IP repository '/share/project/openwifi-v1.4.0/openwifi/openwifi-hw/boards/zc706_fmcs2/ip_repo'.
# set obj [get_filesets sources_1]
# set files [list \
#  [file normalize "${origin_dir}/../../adi-hdl/library/common/ad_iobuf.v"] \
#  [file normalize "${origin_dir}/src/system_wrapper.v"] \
# ]
# add_files -norecurse -fileset $obj $files
INFO: [Project 1-1716] Could not find the wrapper file /share/project/openwifi-v1.4.0/openwifi/openwifi-hw/boards/zc706_fmcs2/src/system_wrapper.v, checking in project .gen location instead.
ERROR: [Vivado 12-172] File or Directory '/share/project/openwifi-v1.4.0/openwifi/openwifi-hw/boards/zc706_fmcs2/src/system_wrapper.v' does not exist

The error message indicates that there is no associated file system_wrapper.v in the above folder. Therefore, I copied the system_wrapper.v from the downloaded file to the route(/share/project/openwifi-v1.4.0/openwifi/openwifi-hw/boards/zc706_fmcs2/src) and ran source ./openwifi.tcl again.However,the system_wrapper.v file in the route will be automatically deleted and the same error will be reported in Vivado again.

Could you help me to solve the problem of how to create the FPGA project of openwifi-v1.4.0 in Vivado 2021.1?

Thanks, The Shy

JiaoXianjun commented 1 year ago

Please offer more detailed context (such as those questions in our issue template), not just the error itself. You could give the step by step operations (and their outputs), that leads to this error, beginning from the scratch (such as, from "git clone").