What is the future for the alpha simulator?

[afberendsen]

I used to work for DEC/Compq/HP supporting Alpha based solutions.

There are few Alpha simulators on the market, including SimH.

What is the future for the SimH Alpha simulator?

I am more than keen to help improve it.

At high level, the Alpha had a similar behaviour as from the VAX-8600.

[markpizz]

The simh Alpha simulator only simulates the CPU and not a complete system. I'm not sure that anyone has access to sufficient detailed information to create all the missing pieces of a working system. If you do, please jump in and help make some progress.

[afberendsen]

Yeah...It will take me some time to learn and build enough knowledge on how to do it. I was hoping to help someone with more knowledge until I can be more productive.

[markpizz]

Over the years that the alpha CPU has been in the codebase, a couple of people have expressed interest in doing something, but we haven't seen or heard of any progress. Significant detailed information and likely access to source code would probably be needed to get to a working solution.

[pkoning2]

There are other simulators that are much more complete, such as "axpbox". Unfortunately that one is GPL so we can't directly draw from it, never mind the fact that it's written in C++.

[afberendsen]

What sort of documents/information will be relevant to help?

I am digging some 20-30 years old files and I found one with title AlphaServer ES47/ES80/GS1280 System Technologies, covering:

AlphaServer ES47, ES80, and GS1280 systems ...................................................2-3
Components of the EV7 CPU................................................................................2-4
EV7 processor features..........................................................................................2-5
The Alpha 21364/EV7 processor ..........................................................................2-6
AlphaServer GS1280 16P system architecture......................................................2-7
64P latency with EV7............................................................................................2-8
Average load to latency .........................................................................................2-9
Seven-stage instruction pipeline..........................................................................2-10
Alpha 21364/EV7 simple block diagram ............................................................2-11
Integrated L2 cache .............................................................................................2-12
Integrated memory controllers ............................................................................2-13
ZBox overview ....................................................................................................2-15
EV7 connectivity .................................................................................................2-16
Dual CPU building block module .......................................................................2-17
CPU system management module.......................................................................2-19
Industry standard RIMMs....................................................................................2-20
Memory guidelines..............................................................................................2-21
Memory configuration guidelines .......................................................................2-22
Memory options...................................................................................................2-23
Comparing RAMbus memory to SDRAM..........................................................2-24
Voltage Regulator Modules (VRMs) ..................................................................2-25
IO7 features .........................................................................................................2-26
IO7 ASIC block diagram.....................................................................................2-28
EV7 processor, memory, I/O...............................................................................2-29
Clock domain hierarchy ......................................................................................2-30
IO7 ASIC function ..............................................................................................2-32
Processor to IO7 building block ..........................................................................2-33
IO7 port 7 function ..............................................................................................2-35
External I/O expansion drawers ..........................................................................2-36
I/O building block drawers..................................................................................2-37
Standard I/O building block drawer ....................................................................2-38
Dual processor to standard I/O drawer................................................................2-39
Standard I/O building block backplane ...............................................................2-40
Standard I/O backplane block diagram ...............................................................2-41
High performance I/O building block drawer .....................................................2-42
Dual processor to high performance drawer .......................................................2-43
High performance I/O building block backplane ................................................2-44
I/O riser module...................................................................................................2-45
Where does the I/O riser module fit? ..................................................................2-46
PBM.....................................................................................................................2-47
PBM block diagram.............................................................................................2-48
Standard I/O module............................................................................................2-49
SIO module block diagram..................................................................................2-50
I/O slot specifications ..........................................................................................2-51
I/O configuration option rules .............................................................................2-52
System I/O expansion..........................................................................................2-53
2P building block drawer.....................................................................................2-54
2P backplane........................................................................................................2-55
2P building block drawer.....................................................................................2-56
2P cable interconnect module..............................................................................2-57
2P cable interconnect module block diagram......................................................2-58
ES47/80 block diagram .......................................................................................2-59
2P interprocessor connections .............................................................................2-60
8P building block drawer.....................................................................................2-61
8P building block.................................................................................................2-62
8P drawer block diagram.....................................................................................2-63
8P building block backplane ...............................................................................2-64
8P backplane interprocessor connections............................................................2-65
Evolution of the EV7 torus 16P...........................................................................2-66
GS1280 block diagram ........................................................................................2-67
Fillers...................................................................................................................2-68
Loopback modules...............................................................................................2-69
MBM bulkhead connectors .................................................................................2-70
AlphaServer ES47 CPU building block rules .....................................................2-71
AlphaServer ES47 base system ...........................................................................2-72
AlphaServer ES80 CPU building block rules .....................................................2-73
AlphaServer ES80 base system ...........................................................................2-74
AlphaServer GS1280 CPU building block rules .................................................2-76
AlphaServer GS1280 base system.......................................................................2-77
AlphaServer GS1280 Model 32 and 64 base system ..........................................2-78
IP cables, 8P box to 8P box .................................................................................2-79
IP cables, 16P system ..........................................................................................2-80
IP cables, 32P system ..........................................................................................2-81
IP cables, 64P system (two CPU racks) ..............................................................2-82
I/O cable, 8P box to PCI Box ..............................................................................2-83
I/O cable to PCI box ............................................................................................2-85
GS1280 power cabinet configuration..................................................................2-86
Power configuration specifications GS1280 model 32 .......................................2-87
I/O and storage rack 30A PDU............................................................................2-88
H7505 power subrack..........................................................................................2-89
WPI module.........................................................................................................2-90
Dual feed AC power............................................................................................2-91
Serviceability.......................................................................................................2-92
2P hot-swap components.....................................................................................2-93
8P hot-swap components.....................................................................................2-94
System cabinet hot-swap components.................................................................2-95
I/O drawer hot-swap components........................................................................2-96
Hot-swap rules and restrictions ...........................................................................2-97

[afberendsen]

...and another ones with the titles:

• AlphaServers GS80/160/1280 System Technologies
• AlphaServer DS1x/DS2x/ES45 System Technologies

[markpizz]

The necessary documentation would normally include: 1) The detailed documentation used by the author(s) of device drivers for EACH of the devices on the system. 2) The source code of EACH of these device drivers would be extremely useful especially when there no longer exists physical hardware to confirm the correctness of the aforementioned documentation. Documentation may not have been consistently updated as the real device drivers were actually written and the driver had to accommodate some aspect of the possibly changed hardware.

[afberendsen]

um...It can sound like a stupid question, but using the *BSD source codes will not provide the required information?

FreeBSD 6.0 supported all Alpha platforms up to ES40: https://www.freebsd.org/releases/6.0R/hardware-alpha/ NetBSD support all the first models: http://wiki.netbsd.org/ports/alpha/ OpenBSD supports a large number of systems: https://www.openbsd.org/alpha.html

[pkoning2]

Reverse engineering hardware behavior from *BSD sources is an option, but not nearly as good as using specs. So if specs can be found that would be the best answer. Also, being bug-for-bug compatible with some BSD isn't necessarily the best option. For example, axpbox is documented as supporting VMS, and also NetBSD with the exception of networking. Does that mean the Ethernet simulation has a bug? Or does it mean NetBSD does? Hard to know, without the specs.

[afberendsen]

That's true. But, at the same time, it is a start.

Since there are three different BDS options to consider, and if each BSD has its own NIC driver, it is more likely that it will work.

After having something running, and if problems are found, contacting HP for help would a natural path.

Better to start with what is available and improve as the development goes.

btw, as the VAX8600 emulator, an Alpha computer have a SMC available, which is another layer of complexity. At same time, it is a good opportunity to ensure that all devices and internal interfaces are working, before dealing with the OS.

[markpizz]

I'd be surprised if all of the BSD versions didn't have the same axp drivers....

[markpizz]

All reasonable ideas.

The starting point (before any OS level functionality can be done) is to make it through the boot ROM images which are certainly available online somewhere. This, by itself, will be a challenging hill to climb. You and others are welcome to try and jump into these waters whenever you are inspired.

[afberendsen]

Well, after checking all the available Alpha emulators, all of them came from the same root program. The configuration files are remarkably similar, and the general coding structure is similar (strings). I will try to mix the current SimH Alpha, plus some ideas from other sources to have a basic running environment for the SRM. At this stage I do not need to consider any I/O devices besides the serial port.

Also, I found tons of good DEC/Compaq documentation covering very low-level system architecture, chipset internal workings.

I Should give it a try. I have loads of free time to use :)

[pkoning2]

That's great news!

I just thought of another drawback of using device drivers as a substitute for device specs: those only tell you about the subset of device features that the driver happens to use. To pick an older example: looking at most PDP-11 OS device drivers will tell you nothing about the behavior of partial block writes, since most OS don't ever do that. But RT-11 does and has a specific requirement for how it behaves. A device emulation writer has to be aware of that to get it to work. If you didn't know that obscure bit of information, and didn't have RT-11 driver sources to examine, you might have a hole in the emulation.

[afberendsen]

Very good points. I will do my best with what I have with me.

If I am stuck somewhere, I suppose I can use the source code from the ES40 and axpbox projects. Is it legal?

I do not want to start with an ES40, since it is a multi CPU architecture and there are many other challenges to deal with.

From the list of Alpa systems, the Alpha Sever 400 seems to be the most simple platform.

I managed to unpack about 100GB of documents from my very old backups. Also, The Internet Archive proved to be an amazing source for old documents.

[pkoning2]

On APXbox etc. source code: please be careful. That code is GPL, which means you cannot use it, or parts of it, in SIMH.

Using code as a form of documentation, and then writing your own code that is not a copy of the GPL code, is different. But the problem is to do that in a way that doesn't expose you to claims of having copied the GPL code.

Using documents rather than GPL code is a better and safer way to go.

One other option would be to work with two people: one to turn what you can learn from GPL code into specifications, the other to write new non-GPL code using those specifications as input. But to do it all as a single person is hard to get right.

[afberendsen]

I see..."a la" creating a new BIOS from the IBM PC BIOS :)

Anyway, first step is to make a list of major devices to include and how they relate to each other,

At least the Alpha CPU processing is already in the SimH source code.

[pkoning2]

Yes, whenever you make use of someone else's work, you need to consider just how you are using it and whether you have permission to do that.
For open source, it's easy to get confused and think "open" means "no restrictions". But that is not true (with the very rare exception of actual "released into the public domain" code). Instead, such code is covered by a license that restricts what you can do with it. The GPL license is particularly tricky because it "infects" other code -- if you merge GPL with something else, by its rules the GPL then applies to the entire combined work. And as a rule, other non-GPL open source projects don't want that, so they refuse to accept any contributions that would bring in GPL bits.