Closed kenpoulton closed 3 years ago
Fixed for group decision of 29 Sep 2021: DBI will be implemented in the Link Layer if at all.
Fixed parts of the spec that called for DDR clocking at the logic interface. Confirmed with group that it is SDR.
Fixed other bugs in the logic interface description. Clarified the description for PHYReset and PHYReady.
request went wrong way
Fixed for group decision of 29 Sep 2021: DBI will be implemented in the Link Layer if at all.
Fixed parts of the spec that called for DDR clocking at the logic interface. Confirmed with group that it is SDR.
Fixed other bugs in the logic interface description. Clarified the description for PHYReset and PHYReady.