First of all nice document!
I am working in the field of ESD at Intel and I currently make some research regarding ESD and EDA for the EDA association as we are updating a report. I see that you mention that the target is 50 V for CDM and 250 V HBM.
You mention some die-to-die interface standard.
Do you eventually as reference document when you mention "die-to-die interface standard"?
Hello @bapivee ,
First of all nice document! I am working in the field of ESD at Intel and I currently make some research regarding ESD and EDA for the EDA association as we are updating a report. I see that you mention that the target is 50 V for CDM and 250 V HBM. You mention some die-to-die interface standard. Do you eventually as reference document when you mention "die-to-die interface standard"?
Have a good day!