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opencomputeproject / Time-Appliance-Project

Develop an end-to-end hypothetical reference model, network architectures, precision time tools, performance objectives and the methods to distribute, operate, monitor time synchronization within data center and much more...
MIT License
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Why +3.3V regulator when +3.3V available on PCIe connector? #33

Closed wisxxx closed 1 year ago

wisxxx commented 2 years ago

The +3.3V step-down regulator on p. 2, C3 has a max current rating of 2 A, for 6.6 W power.

Since the PCIe connector allows for up to 9.9 W for a standard height x4 card, why is there a regulator for +3.3V on the Timing Card?

ahmadexp commented 2 years ago

This is a common practice to not rely on the 3.3v or 5v rails of the PCIe and only use the 12v to make your own voltages. I am open to any suggestions though.

wisxxx commented 2 years ago

It depends on the loading. Do you have any data from the Xilinx Power Estimator for how much current is drawn on the +1.0V, +1.2V, +1.5V, and +1.8V rails?

wisxxx commented 1 year ago

Data available from open source FPGA files.